cpu architecture (fetch decode execute ) Flashcards
what are the three stages of the fetch decode execute cycle
fetching decoding executing
what happens in the fetch part of the fetch decode execute cycle
PC is loaded with 0
value from pc copied to MAR
data from MAR is sent across the address bus with the instructions for the data sent by the control bus
The data from that location in memory is sent down the data bus to the MDR
pc increments by one
what happens in the decode part of the fetch decode execute cycle
data sent from MDR to CIR where it is split into operand and opcode this is sent to CU to be and sent to the ALU or accumulator
what happens in the execute stage of the fetch decode execute cycler
if a value is being inputted then the ACC (accumulator) stores it if the data is being outputted then the ACC is set to that data currently.
If the data is being loaded from RAM then the data is sent to MDR
If data is being stored then data will be sent from the ACC to the MDR to the RAM by data buses
What is the ACC
the accumulator receives the result of the ALU and acts as a general purpose register
general purpose registers
temporarily stores data in the processor ca be accessed quickly
what is the address bus
the address bus carries the memory location of the register it is going to or from
what is a control bus
a control bus manages the execution of instructions
what is the data bus
A bi-directional bus that carries data and instruction between processor and memory
what is the Harvard architecture
A computer architecture that stores data and instructions in separate memories to allow the next instruction to be read whilst the data is currently being read or written
disadvantage of Harvard architecture
CPU is expensive to manufacture
unoccupied space in memories can not be interchangeably used
what are io controllers
interface that allows processors to connect with input output devices
what is main memory
main memory is a data store for instructions to be directly addressed by the processor
what is a processor
A processor is a complex of transistors capable of executing programs
what is von Neuman architecture
A computer architecture where a single control unit manages program control via a linear sequence of fetch decode execute cycles data and instructions are held in the same memory
what is the stored program concept
the stored program concept is that machine code instructions stored in main memory are fetched and executed serially by a processer that perform logic and maths calculation
What is the ALU
the ALU or arithmetic logic unit is the part of the processor that performs arithmetic calculations and logical operations for computer programs
clock
a timing device that is connected to the processor that periodically sends a signal to synchronise the FDE cycle
What is the control unit
the control unit (CU) A part of the processor that controls and manages execution of instructions it sends control signals to coordinate execution and controls buses
what is the CIR current instruction register
The CIR is a dedicated register that stores the address of the instruction that is being executed
what is a Dedicated register
the register reserved for a special purpose or role
what is a memory address register
the memory address registers a register that stores the address of the of the next instruction
what is the MBR or MDR
special register that temporarily stores data to be read from or written to the computers memory
What is the program counter
the program counter is a dedicated register that stores the address of the next instruction to execute
