cpu architecture (fetch decode execute )

Question 1

what are the three stages of the fetch decode execute cycle

Answer 1

fetching decoding executing

Question 2

what happens in the fetch part of the fetch decode execute cycle

Answer 2

PC is loaded with 0
value from pc copied to MAR
data from MAR is sent across the address bus with the instructions for the data sent by the control bus
The data from that location in memory is sent down the data bus to the MDR
pc increments by one

Question 3

what happens in the decode part of the fetch decode execute cycle

Answer 3

data sent from MDR to CIR where it is split into operand and opcode this is sent to CU to be and sent to the ALU or accumulator

Question 4

what happens in the execute stage of the fetch decode execute cycler

Answer 4

if a value is being inputted then the ACC (accumulator) stores it if the data is being outputted then the ACC is set to that data currently.
If the data is being loaded from RAM then the data is sent to MDR
If data is being stored then data will be sent from the ACC to the MDR to the RAM by data buses

Question 5

What is the ACC

Answer 5

the accumulator receives the result of the ALU and acts as a general purpose register

Question 6

general purpose registers

Answer 6

temporarily stores data in the processor ca be accessed quickly

Question 7

what is the address bus

Answer 7

the address bus carries the memory location of the register it is going to or from

Question 8

what is a control bus

Answer 8

a control bus manages the execution of instructions

Question 9

what is the data bus

Answer 9

A bi-directional bus that carries data and instruction between processor and memory

Question 10

what is the Harvard architecture

Answer 10

A computer architecture that stores data and instructions in separate memories to allow the next instruction to be read whilst the data is currently being read or written

Question 11

disadvantage of Harvard architecture

Answer 11

CPU is expensive to manufacture
unoccupied space in memories can not be interchangeably used

Question 12

what are io controllers

Answer 12

interface that allows processors to connect with input output devices

Question 13

what is main memory

Answer 13

main memory is a data store for instructions to be directly addressed by the processor

Question 14

what is a processor

Answer 14

A processor is a complex of transistors capable of executing programs

Question 15

what is von Neuman architecture

Answer 15

A computer architecture where a single control unit manages program control via a linear sequence of fetch decode execute cycles data and instructions are held in the same memory

Question 16

what is the stored program concept

Answer 16

the stored program concept is that machine code instructions stored in main memory are fetched and executed serially by a processer that perform logic and maths calculation

Question 17

What is the ALU

Answer 17

the ALU or arithmetic logic unit is the part of the processor that performs arithmetic calculations and logical operations for computer programs

Question 18

clock

Answer 18

a timing device that is connected to the processor that periodically sends a signal to synchronise the FDE cycle

Question 19

What is the control unit

Answer 19

the control unit (CU) A part of the processor that controls and manages execution of instructions it sends control signals to coordinate execution and controls buses

Question 20

what is the CIR current instruction register

Answer 20

The CIR is a dedicated register that stores the address of the instruction that is being executed

Question 21

what is a Dedicated register

Answer 21

the register reserved for a special purpose or role

Question 22

what is a memory address register

Answer 22

the memory address registers a register that stores the address of the of the next instruction

Question 23

what is the MBR or MDR

Answer 23

special register that temporarily stores data to be read from or written to the computers memory

Question 24

What is the program counter

Answer 24

the program counter is a dedicated register that stores the address of the next instruction to execute

Question 25

what is the status register

Answer 25

the status register is a register that is specifically for tracking the progress of the processor

Question 26

what is an instruction set

Answer 26

an instruction set is a sequence of operations that can be recognised by a particular processor

Question 27

what is opcode

Answer 27

opcode is the part of an instruction that explains what action the instruction performs

Question 28

what is the operand

Answer 28

the part of the instruction with a value memory address or register that the instruction will act on during its execution

Question 29

what is direct addressing

Answer 29

a form of addressing an instruction such that the operand is the address of the required datum

Question 30

what is immediate addressing

Answer 30

immediate addressing is the addressing of an operation such that the operand is the required datum

Question 31

what is a hard disk

Answer 31

secondary storage that consists of circular magnetic disks has moving parts

Question 32

what is an optical disk

Answer 32

secondary storage device that consists of a single disk that stores data

Question 33

what is a solid state drive

Answer 33

a secondary storage consisting of NAND flash memory and a controller that stores data electronically with no moving parts