Cortex-M0+ Instructions

Question 1

What is the difference between ADD and ADDS?

Answer 1

ADDS will update the condition flags depending on the result of the ADD operation

Question 2

R0: 4000
R1: 200

ADD R0, R0, R1
What values are in the registers?

Answer 2

R0: 4200
R1: 200

Question 3

R0: 4000
R1: 200

SUB R0, R1, #100
What values are in the registers?

Answer 3

R0: 100
R1: 200

Question 4

R0: 4
R1: 2

MULS R1, R0, R1
What values are in the registers?

Answer 4

R0: 4
R1: 8

Question 5

R0: 4
R1: 2

CMP R0,R1
What are the condition flags?

Answer 5

N:0
Z:0
C:0
V:0
Note: R0-R1

Question 6

R0: 4
R1: 2

CMP R1,R0
What are the condition flags?

Answer 6

N:1
Z:0
C:0
V:0
Note: R1-R0

Question 7

When is the N condition flag set?

Answer 7

When the result of an operation is negative.

Question 8

When is the Z condition flag set?

Answer 8

When the result of an operation is Zero.

Question 9

When is the C condition flag set?

Answer 9

When an operation results in a carry.
1) When addition result is greater than 32 bits.
2) If subtraction result is zero or positive.
3) As a result of inline barrel shifter operation

Question 10

When is the V condition flag set?

Answer 10

When an operation results in overflow. When the resulting sign is wrong.
1) If Neg+Neg=Pos
2) If Neg-Pos=Pos
3) If Pos+Pos=Neg
4) If Pos-Neg=Neg

Question 11

When does the processor enter Handler mode?

Answer 11

When servicing an exception or interrupt.

Question 12

Thumb Instructions
How long are Full ARM Instruction?
How long are Thumb Insruction?

Answer 12

Full ARM: 32 Bits
Thumb: 16 Bits

Question 13

What is the difference between Machine Language and Assembly Language?
How do you convert between them?

Answer 13

In Machine Language instructions are represented by numerical values ready to be processed directly by the CPU.
Assembly language is a human readable representation of machine language where instructions have mnemonic names.
Usually we generate Machine language with the help of an Assembler (software tool)

Question 14

True or False?
Only Load, Store, Pop and Push instructions can access memory.

Answer 14

True.
Other instructions must use operands in registers or using immediate values

Question 15

True or False?
Immediate values can be any length?

Answer 15

False.
Only between 0 and 255.

Question 16

After a single register PUSH instruction how much will the value of the SP change?

Answer 16

It will decrease by 4.
As memory is byte addressable and 4 bytes have been added. The stack pointer decreases as the stack grows.

Question 17

The following code resultsin the number -14 in R0.

MOV R0,#0xd
MVNS R0,R0

How do these instructions work to generate -14?
Why not generate -14 using the MOV instruction and -14 as an immediate value?
Why not retrieve -14 from memory with a load instruction?

Answer 17

The value 13 is generate and placed in R0 then the MVNS performs and EOR operation with 0xFFFFFFFF and 0xd. The result is the signed representation of -14.

Immediate values can only be between 0 and 255.

Valid but retrieval from memory is slow.

Question 18

Branch instructions can have a conditional suffix attached. What is the condition of the suffix EQ?

Answer 18

Equal.
After a compare if the Zero flag is set the operands where equal.

Question 19

Branch instructions can have a conditional suffix attached. What is the condition of the suffix NE?

Answer 19

Not Equal.
After a compare if the Zero flag is not set the operands where not equal.

Question 20

Branch instructions can have a conditional suffix attached. What is the condition of the suffix CS or HS?

Answer 20

Carry Set / (unsigned) Higher or Same.
Greater than or equal.

Question 21

Branch instructions can have a conditional suffix attached. What is the condition of the suffix CC or LO?

Answer 21

Carry Clear/(Unsigned) Lower.
Less than.

Question 22

Branch instructions can have a conditional suffix attached. What is the condition of the suffix MI?

Answer 22

Negative.

Question 23

Branch instructions can have a conditional suffix attached. What is the condition of the suffix PL?

Answer 23

Positive.