Computer Organisation & Architecture Flashcards
Arithmetic Logic Unit (ALU)
performs arithmetic calculations and logical operations
Control unit
controls and coordinates activities of CPU/directs operations of all other components in processor
System clock
generates regular clock pulses by emitting a series of signals that oscillate between 0 and 1
General purpose registers
special memory cells that can be accessed quickly - temporarily stores data and controls information
Registers
locations of computer memory within the processor that provide extremely fast access
Program Counter (PC)
holds the address of the next instruction to be executed by processor
Current Instruction Register (CIR)
holds current instruction that processor is executing
Status Register (SR)
records the condition of the CPU as a result of arithmetic, logical or command operations
Memory Address Register (MAR)
temporarily holds address of memory location in main memory from which data or instruction is either read from or written to
Memory Buffer Register (MBR)
temporarily stores the data read from or written to memory
Accumulator
stores results of any calculation processed by ALU
Instruction set
set of all operations that can be executed by a processor
Opcode
part of an instruction that tells the CPU what operation to perform
Operand
element that identifies the values to be used in a calculation e.g. data value, memory address or register
Direct addressing
where operand holds memory address of the value to be operated on
Immediate addressing
where operand is the actual value to be operated on
Processor
part of the computer that processes data by executing program instructions
Main memory
memory that can be directly accessed by the processor - consists of memory locations that store instruction/data as binary sequence
Bus
set of parallel wires connecting two or more components of a computer
Control bus
sends control signals that manage operations that take place inside the computer system - also carries the clock signal
Data bus
used to transfer data/instructions to and from the processor
Address bus
used to identify the physical address of a memory location to either read/write data from/to that location
Word
amount of data that can be handled at one time by the processor
I/O Controller
device which interfaces between I/O devices and processor - provides a set of addressable registers that processor can access to communicate with the I/O devices
Von Neumann Architecture
where memory is used to store both programs and data together
Harvard Architecture
uses separate memory for data and programs/instructions
I/O interrupts
occurs when computer is performing a data transfer operation to an I/O device has an error during transmission
Timer interrupts
occurs when an allotted amount of time has expired and an action needs to be performed
Hardware interrupts
hardware failure has occurred and needs to be addressed
Cache memory
small volume of high-performance RAM built directly into processor - acts as a temporary storage area that the processor can retrieve data from easily
