Computer Architecture Flashcards
Von Neumann architecture
Three Classic Features
A single main memory unit shared between program instructions and data. This means that the program is stored with the data in the same format. A single control unit managing program control. Sequential processing takes place with instructions being fetched from memory, decoded and executed one after another, one at a time, in a serial manner. This is known as the fetch-execute cycle.
Fetch-Execute Cycle
PC holds address of next instruction. Copy contents of PC to MAR. Increment PC. Load instruction pointed to by the MAR to MDR. Copy instruction from MDR to CIR. Decode (and execute) instruction in CIR.
Execution of JUMP inst
By changing contents of PC (to address part of instruction). Copy address part of instruction… in CIR to PC
Register
Location in the processor used for a particular purpose. Temporarily stores data/control information. Allows very high speed access.
PC - Program Counter
PC holds address of next instruction. PC passes this address to MAR…PC is incremented (in each cycle). PC is changed when there is a jump instruction…by taking address from instruction in CIR.
MAR – Memory Address Register
Receives address of instruction (from PC). Holds address of data/instruction to be used. Receives operand part of instruction from CIR.
MDR – Memory Data Register (Also known as Memory Buffer Register MBR)
Receives an instruction/data…from memory location in MAR. Receives data/instruction from…memory location in address part of instruction/accumulator. Instruction in MDR is copied to CIR. MDR acts as a buffer/temporary store…storing data / an instruction…when being transferred between memory & processor.
CIR – Current Instruction Register (Also known as Instruction Register)
Contains the instruction to be executed. Splits instruction into component parts. Holds op-code while it is decoded. Sends the address to the MAR for accessing data/value to accumulator. Sends address to PC for jump instruction. Determines the type of addressing to be used.
Accumulator
Holds data being processed. Temporary storage of intermediate results (in the ALU) is where calculations are performed.
Input & output data passes through.
Pipelining
Overlaps the three phases of an instruction (fetch-decode-execute) and uses idle registers. This helps with the speed of throughput unless the next instruction in the pipe is not the next one that is needed. If a JUMP instruction is encountered the pipeline must be flushed and refilled.
Co-processor
An additional processor…used for a specific task. Improves processing speed by executing concurrently. E.g. maths co-processor/floating point accelerator.
Adv: Allow more complex calculations/processing to be given to a dedicated co-processor which only processes these similar calculations. Disadv: Increased cost of computer (extra component). Can only carry out specific operations.
E.g. Maths co-processor
Floating point binary representation requires a long string of bits so Maths co-processor has a number of registers long enough to handle this length in one go making processing faster.
Parallel processor
More than one processor…working together …to perform a single job…which is split into tasks. Each task may be processed by any processor. Processors are controlled by a complex operating system
Adv: Allows faster processing - greatly increases the speed programs can execute. More than one instruction (of a program) is processed at the same time. Different processors can handle different tasks/parts of same job. Speeds up the processing of data from many inputs. Disadv: A more complex program must be developed, compared to the traditional sequential program, to allow execution of different parts at the same time. Operating system is more complex to ensure synchronisation.
Array (Vector) Processor
A processor that allows the same instruction to operate simultaneously …on multiple data locations using multiple ALUs. Single Instruction Multiple Data (SIMD). Lots of data items get processed with a single instruction. E.g. Weather forecasting, airflow simulation around new aircraft. Adv: Many ALUs (arithmetic logic units) so useful for manipulating 1 dimensional arrays where the same calculation can be applied to every element in the array in one cycle. This is very fast (takes one cycle). Disadv: High price of array memory systems. Increased code complexity.
RISC
Reduced Instruction Set Computer - a limited number of instructions is available. Has several register sets. An instruction performs a simple task. Uses only simple instructions. Complex tasks can only be performed by combining a number of instructions…so a task may take a number of machine cycles.
