Chapter 5 Flashcards
What is the von Neumann architecture of a computer?
The von Neumann architecture, shown in diagram 5.1, is based on a central processing unit (CPU), interacting with a memory device, receiving data from some input device, and sending data to some output device. At the heart of this architecture lies the stored program concept: The computer’s memory stores not only the data that the computer manipulates, but also the very instructions that tell the computer what to do. Let us explore this architecture in some detail
What are the two parts of a computer’s memory?
the memory is divided into two areas. One area is dedicated for storing data, e.g. the arrays and objects of programs that are presently executing, while the other area is dedicated for storing the programs’ instructions.
What is the Data Memory?
Data Memory: High-level programs manipulate abstract artifacts like variables, arrays, and objects. After the programs are translated into machine language, these data abstractions become binary codes, stored in the computer’s memory
What is the CPU?
Why does the CPU contain registers?
: Since the CPU is the computer’s centerpiece, it must perform as efficiently as possible. In order to boost performance, it is desirable to store the intermediate results that computer programs generate locally, close to the ALU, rather than ship them in and out of the CPU chip and store them in some remote and separate RAM chip. Thus, a CPU is typically equipped with a small set of 2 up to 32 resident high-speed registers, each capable of holding a single word.
What does the CPU’s control unit do?
Control Unit: A computer instruction is represented as a binary code, typically 16, 32, or 64 bits wide. Before such an instruction can be executed, it must be decoded, and the information embedded in it must be used to signal various hardware devices (ALU, registers, memory) how to execute the instruction.
The instruction decoding is done by some control unit, which is also responsible for figuring out which instruction to fetch and execute next.
The CPU operation can now be described as a repeated loop: decode the current instruction, execute it, figure out which instruction to execute next, fetch it, decode it, and so on. This process is sometimes referred to as the “fetch-execute cycle”.
What regesters does a CPU have?
Data registers, Adress registers and a Program counter.
Data registers: These registers give the CPU short-term memory services. For example, if a program wants to calculate (a − b) ⋅ c, we must first compute and remember the value of (a − b). In principle, this temporary result can be stored in some memory register. Clearly, a much more sensible solution is to store it locally inside the CPU, using a data register. Typically, CPU’s use at least one and up to 32 data registers.
Address registers: Many machine language instructions involve memory access: reading data, writing data, and fetching instructions. In any one of these operations, we must specify which memory register we wish to operate on. This is done by supplying an address. In some cases, the address is coded as part of the instruction, while in other cases the address is specified, or computed, by some previous instruction. In the latter case, the address must be stored somewhere. This is done using a CPU-resident chip called address register.
Program counter: When executing a program, the CPU must always keep track of the address of the instruction that must be fetched and executed next. This address is kept in a special register called program counter, or PC. The contents of the PC is computed and updated as a side effect of executing the current instruction.
Of what parts does the Hack CPU consist?
The Hack CPU consists of the ALU built in project 2 and three registers called data register (D), address register (A), and program counter (PC), identical to the 16-bit registers built in project 3.
What is the interface of the Hack CPU?
What is it’s input?
What is the interface of the Hack CPU?
What is it’s output?
How is the data memory of the Hack computer built? What are it’s main parts?
What is the interface of the Program Memory in the Hack computer?
How are the three main components of the Hack computer (the program memory, the CPU and the instruction memory) physically connected?
