Chapter 4 - System Architecture Flashcards
IEEE/ISO 42010:2007
Systems and software engineering architecture description
Computer security
Defined as AIC
What is an architects job?
To successfully create views for each stakeholder into a single global plan
Register
A temporary storage location for the next CPU task
Arithmetic logic unit ALU
Actual execution of instructions occurs here, this is the brain of the processor
Control unit
The traffic cop of the CPU .. It serializes the requests from the registers to the ALU
General vs special registers
General registers hold variables and temporary data
Special registers hold more static data like program counters and pointers
What is the name for the bit that defines user mode vs privileged?
Program status word - PSW
What is another name for user mode and privileged mode respectively?
Problem state and kernel/supervisor mode
What is the difference between address bus and data bus?
Address bus tells the location what it’s looking for data bus is what allows the data to move between location and CPU
LIFO
Last in first out
The order things are processed on the memory stack (think mtg)
Return pointer
Usually the first message in telling where to send the data
Stack pointer
This is the current stack location while processing a stack
Program counter
Holds the memory address for the CPU actions needed
Cooperative multitasking vs preemptive multitasking
Cooperative means the resource programmatically releases the resources and preemptive means that the is controls all processing
Ready, blocked and running state?
Ready - waiting process
Running - executing process
Block - suspended
Process table
Think task manager
Maskable vs non-maskable interrupt
Maskable means that the CPU can ignore it and no maskable means the CPU must immediately execute it
Watchdog timer
System will reboot if critical systems fail
Threads
Individual instruction set
Software deadlock
When a resource is being used by another process and cannot continue, but the other process will not release until the first finishes
Process isolation
Ensuring that processes cannot use memory space of another process, this is required for preemptive multitasking
Process Encapsulation
When process A can only speak to an interface from process B
Data hiding
When one process does not know how another works, it simple sends to the interface between
Time multiplexing
Time slices for resources
Process naming distinction
PID is used to assist process isolation
Virtual memory addressing
Rather than address to memory applications address to the memory space allocated by the OS
Abstraction
The details of something are hidden
Memory manager functions?
Relocation - swap file, pointers
Protection - limit process access and access control
Sharing - complex controls govern memory space sharing
Local org - allow sharing of procedures like DLL
Physical org - virtual memory management
What is a base and limit register?
Base register is the beginning address of a memory segment and limit register is the last address
DRAM
Capacitive memory that requires a refresh to ensure the capacitors do not lose charge
SRAM
Static memory uses exclusively transistors and does not require refresh
Thrashing
Moving data around to free resources for more data
What is the difference between EEPROM and flash
EEPROM need firmware updates that write bit by bit over the previous
Flash can be rewritten at the block or device level and acts like a hard drive
Absolute addresses vs logical
Physical vs virtual memory
Buffer overflow
When the buffer is too large and malicious code can be inserted
If accepted input is larger than input there is a possibility of inserting data
ASLR - Address space layout randomization
When an OS randomized and shifts address spaces around in memory
DEP - data execution prevention
Locked down memory spaces for certain executables
Memory leaks
Not using proper code that will release memory
Programmed IO
The application requests that the IO take place, this is CPU wasteful
Interrupt IO
Byte is sent, CPU moves on, interrupt occurs, byte is sent
This is better but still uses the CPU
IO over DMA
Also called unmapped IO
Does not use the processor, it’s just sent from memory to the DMA controller to the device
Premapped IO
OS assigns memory address and trusts device not to be malicious
Scary
Fully mapped IO
OS brokers the IO requests of untrusted device
What is ring architecture?
CPU levels. Ring 0 is unprotected ring 3 would be more protected. The CPU manufacturer decides the number of rings, OS decides how to use them.
What does the word domain mean?
A collection of resources