Chap 4 -Part 1 - The Processor Flashcards
1
Q
Overview of Implementation
A
2
Q
CPU Overview
A
3
Q
Image showing the:
Control
A
4
Q
Describe the Control
A
5
Q
Define:
Combinational Element
A
This is an operational element, such as an AND gate or an ALU
6
Q
Define:
State Element
A
This is a memory element, such as a register or memory
7
Q
Define:
Edge-Triggered Clocking:
A
This is a clocking scheme in which all state changes occur on a clock edge.
8
Q
Logic Design Basics
A
9
Q
Image showing example of:
Combinational Elements
A
10
Q
Define Datapath
A
Datapath:
- elements that process data and address in the CPU.
- eg.
- Registers, ALUs, mux’s, memories….
- eg.
11
Q
When Handling Instructions [Image]
A
12
Q
Instruction:
Fetch/Decode/Execute
A
13
Q
Instruction FETCH
A
14
Q
R - Format Instructions:
Describe it:
A
15
Q
Load/Store Instructions
A
16
Q
Branch Instructions
A
17
Q
Composing the elements
A
18
Q
Full Datapath Image;
A
19
Q
Sequential Elements Part 1
A
20
Q
Sequential element part 2
A
21
Q
Clocking Methodology concept
A
