Cache and Virtual Memory Flashcards

1
Q

Why is cache implemented?

A

Fetching data and instructions from memory is inefficient as the memory is further away from the CPU and is slower.

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2
Q

What is temporal locality?

A

If an item in memory is referenced, then it is likely to be referenced again soon.

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3
Q

What is spatial locality?

A

If an item in memory is referenced, then it is likely that those nearby will be referenced soon.

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4
Q

What are cache hits and cache misses?

A

∙ a cache hit — read data from cache;

∙ a cache miss — read data from memory into cache first.

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5
Q

What are the 3 cache designs?

A

Direct mapped;
fully-associative;
set-associative.

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6
Q

What is direct-mapped cache?

A

A memory address is mapped to exactly one cache address.

Search is efficient, if items are mapped in the same place, the previous item is discarded.

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7
Q

What is fully-associative cache?

A

A memory address is mapped to the least-recently-used cache address. Not used much, longer to search.

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8
Q

What is set-associative cache?

A

A memory address is mapped to exactly one cache set, each location can contain a small set of addresses. A memory address is mapped to the least recently used place in that set.
Small searches are reasonably efficient.

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9
Q

What is the relationship between caches?

A

A fully-associative cache with 𝑆 slots is an 𝑆-way associative cache — there is 1 set of size 𝑠.

A direct-mapped cache with 𝑆 slots is a 1-way set-associative cache — there are 𝑆 sets of size 1.

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10
Q

What are the 2 options of write hits?

A

∙ write back — write into cache only, memory is not updated;

∙ write through — write into both cache and memory, slower, usually used for multicore environments.

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11
Q

What are the 2 options of write misses?

A

∙ write around — write into memory only;

∙ write allocate — write into memory and read into cache.

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12
Q

What is virtual memory?

A

Extends the idea of a cache memory to disk.

Too many processes in memory rolls it out to the storage disk.

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13
Q

How is virtual memory divided?

A

Virtual memory (disk) is divided into pages, and addresses are seen as (virtual-page-number, offset) pairs.

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14
Q

How is RAM divided?

A

Physical memory (RAM) is divided into frames, and addresses are seen as (physical-frame-number, offset) pairs.

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15
Q

What is a page table?

A

A per-process page table maps virtual-page-numbers to

physical-frame-numbers or to swap-space on disk.

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16
Q

What is inter-process protection?

A

A supervisor mode provides inter-process protection from addressing errors by others. A process cannot see the page table protecting them.

17
Q

What is intra-process protection?

A

Virtual page protection bits provide intra-process protection from addressing errors by self.

18
Q

Examples of other places where caching is used.

A

Web browsers,

Graphics (cached rendering of the frame).