Assembly Part 1 Flashcards
The format and behavior of a machine level program is defined by the ________, defining the processor state, the format of the instructions, and the effect these instructions have on the state.
Instruction set architecture
The ______ (commonly referred to as the PC and called %rip) indicate the address of the next instruction to be executed
Program counter
The integer _____ contains 16 name location storing 64-bit values. These registers can hold _____ (corresponding to C pointers) or _____ data
Register file, addresses, integer
The ____ hold status information about the most recently executed arithmetic or logical instruction. These are used to implement conditional changes in control or data flow such as is required to implement if and while statements
Condition code registers
Assembly code suffix for char (1 byte)
B
Assembly code suffix for short (2 bytes)
W
Assembly code suffix for int
L
Assembly code suffix for long
Q
Assembly code suffix for char *
Q
Assmebly code suffix for float
S
Assembly code suffix for double (8 bytes)
L
An x86-64 central processing unit (CPU) contains a set of ____ general purpose registers storing ____ bit values
16, 64
All of the x86 register we can use expect ____ and ____
Rsp and rbp
Rsp and rbp are _____ registers and should not be used for any other purpose
Stack management
Rsp is the address of the _____ of the stack (it points to the last value pushed on the stack)
Top
Rbp is a frame pointer: it points to the _____ of the stack frame of the function which is currently executing
Bottom
The ____ instruction copies a value from one location (operant 1) to another location (operand 2)
Mov
The instruction _____, the size of operand 1 and the size of operand 2 must all match
Suffix
______: constant integer data. Prefixed with _____
Immediate, $
_______: one of the 16 integer ____
Register, registers
____: 8 consecutive bytes of memory at address given by register. ____ means read from the address specified in register. (I.e, use value in register as pointer)
Memory, parentheses
(%rax)
Memory addressing mode 1
Mem[Reg[R]]
Movq(%rcx), %rax =
Register R specifies a memory address
Rax = *rcx
Memory Addressing mode 2
Imm(R) =
Movq 8(%rbp), %rdx =
Mem[Imm+Reg[R]]
Rdx = *(rbp+8)
What is size of memory address of coelinux
8 bytes
What is the only suffix we should be using when we are calculating/ moving addresses
Q
What size register should be use when we are calculating addresses
Rax, rax, red, rdx, r12, etc
Is this valid instruction
Movq (%ecx), %eax
No, must use rcx not ecx because we are accessing the value at the memory address stored in rcx
Is this instruction valid
Movb (%rax), %al
Yes
Imm(Rb, Ri, S)
Mem[Imm + Reg[Rb] + Reg[Ri]*S]
Immediate
Can be an constant value (constant displacement)
Rb
Base register, can be any of the 16 registers
Ri
Index register
Ri can be any of the register except ____
%rsp
S
Scale, can only be 1,2,4,8
%rdx contains start address of array (0x600400)
%rcx contains index into ar1 (e.g 15)
What if we want to access arr1[15]
Movl (%rdx,%rcx,4), %eax
(Rb,Ri)
Mem[Reg[Rb] + Reg[Ri]]
Imm(Rb,Ri)
Mem[Reg[Rb] + Reg[Ri] + Imm]
(Rb, Ri, S)
Mem[Reg[Rb] + s*Reg[Ri]]
Imm(,Ri,S)
Mem[Imm + Reg[Ri]*S]
Imm
Mem[Imm]
Suffix and ______ register size must match (on a read from memory). Address calculations are always 8 bytes
Destination
Suffix and ______ register size (on a write to memory) must match. Address calculations are always 8 bytes
Source
Address computation instruction
Leaq src, dst
Leaq computes address without ______
Memory reference
Leaq does not affect ______
Condition codes
Interpret Leaq 24(%rax, %rcx, 4), %rdx
Compute a 8-byte value: (%rax + 4*%rcx + 24) and store in %rdx
Is this valid
Leal 24(%eax, %ecx, 4), %edx
Yes
Only ___ and ___ suffix work with lea instruction in x86-64
Q,l
