Assembly Language and Control Flow Flashcards
Assembly Operands: Memory
Memory can be thought of as a single one-dimensional array each cell stores a byte size value
Data is stored in memory as: __
Each register is 32-bits which is the size of a “word”
Data is stored in memory as: variables, arrays, structures
Assembly language is focused on high performance. Thus, given differences between registers and memory , programmers should …..:
Programmers should minimize the number of instructions
Registers are fast (1 ns)
Memory is slow (100 ns)
loading and storing has its costs and benefits
ARM is LOAD/STORE architecture
- does not support memory to emory data processing operations
- must move data values into registers before using them
loading data values from memory into registers done in hardware in parallel
process data in registers using a number of data processing instructions. which are not slowed down by memory access
store results from registers out to memory (done in background)
Memory is a “single” one-dimensional array where each cell stores a byte (size) of data
Accessed/Referred to by a 32-bit address
| 0x0a |. | 0x0b | | 0x0c |. | 0x0d |
0x 4000 0x 4001 0x 4002 0x 4003
ARM arithmetic instructions only operate on registers , never directly on memory
Data transfer instructions transfer data between register and memory
- LOAD from memory to register
- STORE from register to memory
ARM has 3 sets of instructions with interact with main memory
- single register data transfer (LDR/STR)
- Block data transfer (LDM/STM) * not for CSE30
- Single Data Swap (SWP) * not for CSE 30
Load
LDR and STR store one word (32-bits)
LDRB / STRB store a byte
LDRH / STRH store halfword or 16bits
LDRSB stores signed byte load
LDRSH stores signed halfword load
Memory systems must support all access sizes
Syntax is :
LDR. [<address>]
STR [address>]
</address>
Data Transfer: Memory to REgister
To transfer a word of Data, we need to specify two things:
Register:
R0 - R15
Memory Address: (more difficult)
-How do we specify memory address of data to operate on?
Remember we load value/data FROM memory
Addressing Modes
There are many ways in ARM to specify the address these are called addressing modes
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Given CMP R4, R2 which condition code bits would need to be set to indicate that R4== R2
Z
Given the following code, elect the appropriate instruction to go in blank :
i = 10;
j = 1;
while (i > 0){
j = j + i;
i--;
}
mov R2, #10 ; i/R2 = 10
mov R3, #1 ; j/R3 = 1
lp: cmp R2, #0 ; while (i > 0){
\_\_\_\_\_ ; .
add R3, R3, R2 ; j/R3 = j/R3 + i/R2;
sub R2, R2, #1 ; i/R2 = i/R2 - 1;
b lp ; }
done:
ble done
The ARM instruction CMP:
Sets bits in the CPSR
Which of the following is true the following instruction
ldr r0, [r1, r2]
r0 is loaded with the contents of memory location r1 + r2
Assume we have an array ARR of ints whose base address (lowest address is 0x1a0000). Assume R1 == 0x1a0000
Given the C statement: j = ARR[12], which assembler instruction is best used to load j (assume j is represented by R3. Assume sizeof(int) == 4 bytes.
ldr r3, r1, #0x30
Given the following piece of code that scans an array of 8-bit values for “-1”. choose the appropriate instruction to fill in the blank:
loop: _________ // while (arr[i] != -1) {
cmp r3, #-1 // .
beq done // .
add r1, r1, #1 // i = i + 1
b loop // }
done:
ldrsb r3, [r1]
Y = &X
STR R1 , [R2]
Y = *X
LDR R2, [R1]
X = arr[4]
LDR R2 , [R1, #16]
Pointers Vs. Values
Effective Addres is CALCULATED
Effective Address =
Offset can be specified in different was
Load INstruction LDR - the memory address of the data that we want to retiree from memory
Store Instruction (STR) - the memory address where we want to write the value which is currently in a register
[R0] - specifies the memory address pointed to by the value in R0
Data Transfer: Memory to Register
Load Instruction Syntax
Load Instruction Syntax: 1 2, [3] • where 1) operation name 2) register that will receive value 3) register containing pointer to memory
X is in register r1 and Y is in r2
LDR r2, [r1]
ARM Instruction Name:
• LDR (meaning Load Register, so 32 bits or one word are loaded at a time)
Y = *X
LDR r2,[r1]
This instruction will take the address in r1, and then load a 4 byte value from the memory pointed to by it into register r2
r1 is called the base register
r1 = 0x200 (base register) 0x200 = 0xaa 0x201 0xbb 0x202 = 0xcc 0x203 - 0xdd
R2 will become 0xddccbbaa
STR r2,[r1]
This instruction will take the address in r1, and then store a 4 byte value from the register r2 to the memory pointed to by r1.
r1 is called the base register
r1 = 0x200 (base register) 0x200 = 0xaa 0x201 0xbb 0x202 = 0xcc 0x203 - 0xdd
R2 will become 0xddccbbaa
Big Endian and Little Endian
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A stack follows the last in first out (LIFO) principle (operations: push, pop). The stack data structure is implemented based on either an array or a linked-list.
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