Architectures Flashcards
What is CISC RISC debate
Debate considering how to split relative complexities and size of hardware and software
CISC
Complex instruction set. A large instruction set to accomplish tasks in as few lines of assembly language as possible.
Complex processor hardware needs to be designed as it can understand and execute the series of subtasks that make up a single complex instruction.
Chipmakers provide a rich set of high level instructions to code with.
How to distinguish CISC
Combining load/store with calculation
Registers in CISC
Less registers to make space for complex decoder so data has to move about more in memory
Cycles in CISC and RISC
CISC- a single instruction may take more than one cycle
RISC- a single instruction takes one clock cycle
Memory movement for CISC
More movement in and out of CPU because fewer registers so often a bottleneck
Coding and compiling CISC
Code is small, tight and easy to write. Compiler generates a single complex machine code instruction to achieve task
RISC reduced instruction set computers
A relatively simple CPU decoder with more registers at the expense of having to write more lines of code to do the same thing
RISC allows…
Parallel processing so performance improves e.g. LDA A and LDA B are independent
Who provide RISC
ARM
Who provide CISC
AMD and INTEL
CISC is better for and RISC is better for…
CISC: complex maths
RISC: basic calculations and comparing (faster for this)
CISC v RISC
- CISC more complex hardware
- CISC more addressing modes
- CISC has more compact software code v more complicated software code
- CISC has more instructions v limited instructions available
- CISC has variable sized bytes, RISC has a fixed number
- CISC uses less ram to store a program v more ram
- CISC fewer registers so more RAM used for intermediate results v more registers so less RAM movement
- Each instruction takes multiple cycles v each instruction takes one cycle each
- RISC = pipelining is possible
- RISC = more addressing modes
Why programs run faster for RISC
Because simpler instructions, each taking one clock cycle
Define co-processor
An extra processor used to supplement the functions of a primary processor , generally carrying out a limited range of functions. Not a general purpose processor able to fetch its own instructions
Computers first built
1940s and 50s
Pioneers of computers
Turing and Von Neumann
Von Neumann machine key idea
Not only program but data being processed by program should be stored in the same memory. Data and instructions should share the same memory and buses
Stored program concept:
Machine code instructions are fetched decoded and executed serially, one at a time by a processor that performs logical and arithmetic operations. The program must be resident in main memory to be executed
Same data (and address) bus for (address of) instructions and data Same word length for all memory: instructions and data
Harvard key idea
Memory split into two parts which are physically separate, one for data and one for memory
Why is Harvard better than Von Neumann
Faster as data and instructions fetched in parallel rather than competing for same bus
The two memories in Harvard
Are physically separate and can have different characteristics e.g. Data in read write and instructions in read only for embedded
E.g. Instructions have more memory with wider bus and word size
Harvard used extensively with
Digital signal processing: embedded e.g. Audio and image processing, sonar processing, radar processing, biomedical processing
disadv of coprocessors
take up motherboard space, more expensive, uses a lot of power, limited by applications ability to take adv
GPU
a co-processor used for offloading computer intensive parts of an application. It has a massively parallel architecture consisting of smaller, more efficient cores to handle tasks simultaneously (vs optimised for sequential serial processing.) Suitable for processing large blocks of visual data simultaneously and manipulating computer graphics and image processing.
