15. Page Translation Flashcards
Ideally, what do we want from address translation?
Fast mapping from ANY virtual byte to ANY physical byte.
OS cannot do this (too slow). We need the help of hardware.
Segments are too large, leading to internal fragmentation, and mapping individual bytes limits the amount of data the TLB can cache. What is the modern solution (middle ground) to these constraints? How does execution locality come into play?
Pages.
Choose a translation granularity that is small enough to limit internal fragmentation, but large enough to allow the TLB to cache entires covering a significant amount of physical memory.
This also limits the size of kernel data structures associated with memory management.
Execution locality helps here because process memory accesses are typically highly spatially clustered, so even a small cache can be very effective
What is execution locality?
Process memory accesses are typically highly spatially clustered.
What are some typical page sizes?
4K is very common. 8K or larger pare also sometimes used.
What is true about the size of the bound for pages?
You can think of pages as fixed sized segments, so the bound is the same for each
What is a virtual page number (VPN)?
The portion of the virtual address that identifies the page
What is the offset portion of a virtual address?
The remaining bits of the virtual address after the part that identifies the page. The offset refers to the entry number on the page itself
What is the relationship between virtual pages and physical pages?
Virtual pages map to physical pages and all addresses inside a single virtual page map to the same physical page
What are the two steps to carry out a page translation?
- Check if a virtual page to physical page translation exists for the given virtual page.
(For 4K pages, split 32-bit address into virtual page number (top 20 bits) and offset (bottom 12 bits) and then check)
- Do the translation. Physical address = Physical page + offset
Where do entries in the TLB come from?
The operating system loads them in
What happens if a process tries to access an address that is not in the TLB?
The TLB asks the operating system for help via a TLB exception. The operating system must either load the mapping or figure out what to do with the process
What are the PROS of paging?
- We can organize and protect regions of memory appropriately (How?)
- It is a better fit for address spaces. Even less internal fragmentation than segmentation due to smaller allocation size (4K)
- There is NO external fragmentation because pages have a fixed allocation size
What are the CONS of paging?
- It requires per-page hardware translation.
2. It requires per-page operating system state
How much memory can we cache translations for using 4K pages and a 128-entry TLB?
512 KB of memory, because 128 entries * 4K per entry = 512K
