14. Address Translation Flashcards
What does the hardware memory management unit (MMU) do during virtual address translation?
It speeds the process of translation once the kernel has told it how to translate an address or according to architectural conventions (MMU is the mechanism)
What does the OS memory management subsystem do during virtual address translation?
It manages translation policies by telling the MMU what to do
When considering virtual address translation mechanism vs its policy, what is the larger goal?
To have the system follow established OS policies while involving the OS directly in the translation as little as possible (because it’s time consuming to trap into the kernel)
Almost every virtual address translation should be able to proceed without kernel assistance.
Why should almost every virtual address translation be able to proceed without kernel assistance?
The kernel is too slow! Recall that the kernel sets the policy. It’s up to the hardware to provide the mechanism.
What is explicit address translation?
The process asks the kernel explicitly what physical address a given virtual address maps to.
Does explicit address translation work?
No. It’s unsafe to allow processes to access/use physical addresses directly (via using the kernel to map to it). All addresses must be translated so processes never know where in physical memory they are
(Think back to the nice controls that address translation provides the kernels. Those controls go away if the process learns where stuff is in physical memory)
What is implicit translation?
When a process acts on a virtual address, but unbeknownst to the process, the machine caries out that action on a physical address that is hidden from the process.
Implicit because the process never knows (and doesn’t need to know) that a translation occurred
What is the “Base and Bound” virtual address mapping approach?
First, assign each process a base physical address and a bound (how far it can go from that base)
Then check to see that the virtual address is between that base and bound.
Finally, translate. The physical address = the virtual address provided + the base address assigned to that process
What are the PROS of the “Base and Bounds” approach to virtual address mapping?
It’s super simple. Hardware only needs to know the base and bounds for each process.
It’s fast. To enforce protection, hardware does one comparison. To carry out translation, hardware does one addition.
What are the CONS of the “Base and Bounds” approach to virtual address mapping?
- It is not a good fit for our address space abstraction because address spaces encourage discontiguous allocation. Base and bounds allocation must be contiguous, otherwise we will lose memory to internal fragmentation (unused mem in address space)
- There is significant chance of external fragmentation due to large contiguous allocations
What is the “Segmentation” approach to virtual address mapping?
It builds off of the base and bounds approach.
We can give multiple bases and bounds per process to allow for discontiguous allocations. We call each base-bound pair a segment.
We can assign each logical region of the address space (code, data, heap, stack) to its own segment, with their own separate size and permissions.
First, each segment has a start virtual address, base physical address, and bound.
Then, check that the provided virtual address is located within a valid segment (Segment start < VA < Segment start + segment bound)
Finally, translate the virtual address as follows:
Physical address = (VA - Seg start) + Seg base
What are the PROS of the segmentation approach to virtual address translation?
- It’s still fairly simple. Protection is enforced (meaning segment exists) with n comparisons for n segments. Translation is done with one addition after the segment is located.
- We can organize and protect different regions of memory appropriately (stack, heap, code, data should have different permissions)
- It’s a better fit for address spaces, leading to less internal fragmentation
What are the CONS of the segmentation approach to virtual address translation?
- It still requires entire segments to be contiguous in memory
- Potential for external fragmentation due to segment contiguity (?)
What does TLB stand for?
Translation look-aside buffer
What do TLBs do?
Typically use content-addressable memory (CAMs) to quickly search for a cached virtual-physical translation
A TLB is basically a table with virtual address –> physical address map entries
