1.2 Processor Performance Flashcards

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1
Q

What does the width of an address bus determine?

A

The maximum possible memory addresses of the system

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2
Q

Bi-directional data bus

A

Data can be sent both ways along the bus

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3
Q

What are the main factors that can affect CPU performance?

A
  • Clock speed
  • The number of cores in the processor
  • The amount and type of cache memory
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4
Q

Why does clock speed affect CPU performance?

A

The faster the clock speed, the faster a computer can fetch, decode and execute instructions

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5
Q

How does the system clock?

A

A sequence of frequent on and off signals are used to synchronise the operations of the components (actions are carried on the rising edge of the clock, which take a fixed number of cycles to complete)

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6
Q

Why does the number of cores affect CPU performance?

A

Each core in theory can process different instructions simultaneously making its own fetch-decode-execute cycle (although some software may not be able to take full advantage of all four processors

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7
Q

Parrallel processing

A

Using several processor cores working at the same time

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8
Q

Why is parallel processing not always possible?

A

Instructions are processed sequentially

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9
Q

Cache

A

A small amount of superfast (but expensive) memory that stores data and instructions that have been recently been used by the processor

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10
Q

What is L1 cache split into?

A

Instruction cache and data cache so that data and instructions can be fetched simultaneously

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11
Q

Pipelining

A

A technique used to improve performance, by example overlapping stages in the fetch-exectue cycle, or by breaking down the stages in an arithmetic instruction

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12
Q

Pipeline example

A
  • An instruction enters the pipeline, and as soon as one stage has been completed, another instruction enters the pipeline
  • A third instruction then enters before either of the others is completed
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13
Q

What are all the factors that can affect CPU performance?

A
  • Clock speed
  • Corse
  • Size and type of cache
  • Size of address bus which determines maximum size of RAM
  • Size of data bus determines the maximum size of an operand in an instruction
  • Pipelining is used to improve efficiency
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