1.1.1 STRUCTURE & FUNCTIONS OF THE PROCESSOR

Question 1

What does the arithmetic logic unit do?

Answer 1

completes all the arithmetical and logical operations

Question 2

what is the control unit?

Answer 2

a part of the processor which directs operations inside the CPU

Question 3

what are registers?

Answer 3

small memory cells that operate at high speeds

Question 4

where do all the arithmetic, logic or shift operations occur ?

Answer 4

they occur in registers

Question 5

what does the program counter do?

Answer 5

holds the address of the next instruction

Question 6

in which part of the CPU do all calculations take place?

Answer 6

the arithmetic logic unit

Question 7

where are intermediate arithmetic and logic results stored?

Answer 7

in the accumulator

Question 8

what does the memory address register do?

Answer 8

holds the address of a location that is to be read from or written to

Question 9

what does the memory data register do?

Answer 9

temporarily stores the data that has just been read from or the data needs to be written

Question 10

what does the current instruction register do?

Answer 10

holds the current instruction divided up into opcode and operand

Question 11

what is a bus?

Answer 11

a set of parallel wires connecting two or more components together

Question 12

what is the system bus?

Answer 12

the collection of the data bus, address bus , and control bus is called the system bus

Question 13

what is the width of the bus?

Answer 13

the number of parallel wires it has

Question 14

what is the data bus?

Answer 14

a bidirectional bus used to transport data and instructions between components

Question 15

what is the control bus ?

Answer 15

the bi-directional bus used to transmit signals between internal and external components

Question 16

what is the address bus used for ?

Answer 16

used to transmit the memory address specifying where data is to be sent from and retrieved from

Question 17

what does adding a wire to the address bus do to the number of addressable locations?

Answer 17

it doubles the number of addressable locations

Question 18

what does bus request indicate?

Answer 18

indicates a device is requesting access to the data bus

Question 19

what doe bus grant indicate?

Answer 19

indicates the CPU has granted access to the data bus

Question 20

what does memory write do?

Answer 20

causes the written data on the data bus to be written into the address location

Question 21

what does memory read do?

Answer 21

causes the data from the addressed location to be placed onto the data bus

Question 22

what does the interrupt request control signal indicate?

Answer 22

indicates that a device is requesting access to the CPU

Question 23

what is the clock control signal used for ?

Answer 23

it is used to synchronise instructions

Question 24

what is assembly language

Answer 24

assembly language is a programming language where mnemonics are used to represent instructions

Question 25

what is opcode ?

Answer 25

opcode is used to determine the type of instruction and what hardware to use to execute it

Question 26

what is the operand?

Answer 26

the operand is the address of where the operations is performed

Question 27

what occurs during the fetch phase?

Answer 27

• the address from the PC is copied to the MAR
• instruction held at that address is copied to the MDR by the data bus, simultaneously the contents of the PC is increased by 1
• the value of the MDR is copied to the CIR

Question 28

what occurs during the decode phase?

Answer 28

the contents of the CIR is split into operand and opcode

Question 29

what occurs during the execute phase?

Answer 29

the opcode is executed on the data

Question 30

what is the clock speed ?

Answer 30

the number of clock cycles completed per second

Question 31

what is cache memory?

Answer 31

the CPU’s onboard memory which can be accessed a lot faster than main memory

Question 32

what is pipelining

Answer 32

the process of completing the fetch, decode and execute of three separate files simultaneously

Question 33

what is von neumann architecture?

Answer 33

architecture in which there is a single shared memory and shared data bus for both data and instructions

Question 34

what is harvard architecture ?

Answer 34

architecture in which there is two seperate memory and data buses for data and instructions

Question 35

what is contemporary processing?

Answer 35

processing in which von neumann architecture is used for main memory.
cache uses harvard architecture, divided into instructions cache and data cache