1.1.1 Structure and function of the processor

Question 1

what is the purpose of the arithmetic and logic unit?

Answer 1

completes all the arithmetical and logical operations

Question 2

what is the control unit?

Answer 2

a part of the processor which directs operations inside the CPU

Question 3

what are registers?

Answer 3

small memory cells that operate at high speeds

Question 4

what does the program counter do?

Answer 4

it holds the address of the next instruction

Question 5

what does the accumulator do?

Answer 5

it holds the results of calculations and operations performed by the ALU

Question 6

what does the memory address register do?

Answer 6

holds the address of a location that is to be read from or written to

Question 7

what does the memory data register do?

Answer 7

temporarily stores the data that has just been read from or the data that needs to be written

Question 8

what does the current instruction register do?

Answer 8

holds the current instruction
(divided up into opcode and operand)

Question 9

what is a bus?

Answer 9

a set of parallel wires connecting two or more components together

Question 10

what is the width of a bus?

Answer 10

the number of parallel wires it has

Question 11

what is the data bus?

Answer 11

a bidirectional bus used to transport data and instructions between components

Question 12

what is the control bus?

Answer 12

the bidirectional bus used to transmit control signals between internal and external components

Question 13

what is the address bus used for?

Answer 13

used to transmit the memory address specifying where data is to be sent from or retrieved from

Question 14

what is opcode?

Answer 14

used to determine the type of instruction and what hardware to use to execute it

Question 15

what is the operand?

Answer 15

the address of where the operation is performed

Question 16

what occurs during the fetch phase?

Answer 16

-the address from the PC is copied to the MAR
-instruction held at that address is copied to the MDR by the data bus, simultaneously the contents of the PC is increased by 1
-the value of the MDR is copied to the CIR

Question 17

what occurs during the decode phase?

Answer 17

the contents of the CIR is split into operand and opcode

Question 18

what occurs during the execute phase?

Answer 18

the opcode is executed on the data

Question 19

what is clock speed?

Answer 19

the number of clock cycles completed per second

Question 20

what is cache memory?

Answer 20

the CPU’s onboard memory which can be accessed a lot faster than main memory

Question 21

what is piplelining?

Answer 21

the process of completing the FDE cycle of three separate files simultaneously

Question 22

what is Von Neumann architecture?

Answer 22

there is a single shared memory and shared bus for both data and instructions

Question 23

what is Harvard architecture?

Answer 23

there is two separate memory and data buses for data and instructions