1.1.1 Structure and function of the processor Flashcards
what is the purpose of the arithmetic and logic unit?
completes all the arithmetical and logical operations
what is the control unit?
a part of the processor which directs operations inside the CPU
what are registers?
small memory cells that operate at high speeds
what does the program counter do?
it holds the address of the next instruction
what does the accumulator do?
it holds the results of calculations and operations performed by the ALU
what does the memory address register do?
holds the address of a location that is to be read from or written to
what does the memory data register do?
temporarily stores the data that has just been read from or the data that needs to be written
what does the current instruction register do?
holds the current instruction
(divided up into opcode and operand)
what is a bus?
a set of parallel wires connecting two or more components together
what is the width of a bus?
the number of parallel wires it has
what is the data bus?
a bidirectional bus used to transport data and instructions between components
what is the control bus?
the bidirectional bus used to transmit control signals between internal and external components
what is the address bus used for?
used to transmit the memory address specifying where data is to be sent from or retrieved from
what is opcode?
used to determine the type of instruction and what hardware to use to execute it
what is the operand?
the address of where the operation is performed
what occurs during the fetch phase?
-the address from the PC is copied to the MAR
-instruction held at that address is copied to the MDR by the data bus, simultaneously the contents of the PC is increased by 1
-the value of the MDR is copied to the CIR
what occurs during the decode phase?
the contents of the CIR is split into operand and opcode
what occurs during the execute phase?
the opcode is executed on the data
what is clock speed?
the number of clock cycles completed per second
what is cache memory?
the CPU’s onboard memory which can be accessed a lot faster than main memory
what is piplelining?
the process of completing the FDE cycle of three separate files simultaneously
what is Von Neumann architecture?
there is a single shared memory and shared bus for both data and instructions
what is Harvard architecture?
there is two separate memory and data buses for data and instructions
