1.1.1: Structure and Function of the Processor Flashcards
1
Q
What does the Arithmetic Logic Unit do to the data?
A
- Performs arithmetic and logical operations on the data
2
Q
What instructions can the Arithmetic Logic Unit do?
A
- ADD
- SUBTRACT
- MULTIPLY
- DIVIDE
- On fixed or floating point numbers
3
Q
What operations can the Arithmetic Logic Unit do?
A
- Shift operations comparing two values
- Using AND, OR, NOT, XOR
4
Q
What does the Control Unit do?
A
- Controls and coordinates the activities of the CPU
- Directs the flow of data between CPU and other devices
5
Q
What does the Control Unit do to the next instruction?
A
- Accepts the next instruction
- Decodes it into several sequential steps [e.g. fetching addresses and data from memory]
- Manages its execution
- Stores the resulting data back in memory or registers
6
Q
What are Registers?
A
- A small amount of very high speed memory
- Used to temporarily store data, and all arithmetic, logical, and shift operations
7
Q
What is the purpose of the Program Counter?
A
- Holds address of the next instruction to be executed
8
Q
What is the purpose of the Accumulator?
A
- Stores results from calculations
9
Q
What is the purpose of the Memory Address Register?
A
- Holds address of a location that is to be read from or written to
10
Q
What is the purpose of the Memory Data Register?
A
- Temporarily stores data that has been read or data that needs to be written
11
Q
What is the purpose of the Current Instruction Register?
A
- Holds the current instruction being executed, divided up into operand and opcode
12
Q
What are Buses?
A
- A set of parallel wires connecting two or more components inside the CPU
13
Q
What is the width of a Bus?
A
- The number of parallel wires the bus has
- Typically 8, 16, 32, or 64 wires wide
14
Q
What is the width of a Bus directly proportional to?
A
- Directly proportional to the number of bits that can be transferred simultaneously at any given time
15
Q
What is the Data Bus?
A
- Bi-directional bus used for transporting data and instructions between components
16
Q
What is the Address Bus?
A
- Uni-directional bus used to transmit the memory addresses specifying where data is to be sent to or retrieved from
17
Q
What is the width of the Address Bus proportional to?
A
- The number of addressable memory locations
18
Q
What is the Control Bus?
A
- Bi-directional bus used to transmit Control Signals between internal and external components
19
Q
What does the Control Bus do?
A
- Coordinates the use of Address and Data Busses
- Provides status information between system components
20
Q
What does the Control Signal ‘Bus Request’ do?
A
- Shows that a device is requesting the use of the Data Bus
21
Q
What does the Control Signal ‘Bus Grant’ do?
A
- Shows that the CPU has granted access to the Data Bus
22
Q
What does the Control Signal ‘Memory Write’ do?
A
- Data is written into the addressed location using this bus
23
Q
What does the Control Signal ‘Memory Read’ do?
A
- Data is read from a specific location to be placed onto the Data Bus
24
Q
What does the Control Signal ‘Interrupt Request’ do?
A
- Shows that a device is requesting access to the CPU
25
What is the Clock used for?
- To synchronise operations
26
What is the Fetch-Decode-Execute cycle?
- A sequence of operations completed in order to execute an instruction
27
What happens in the registers during the 'Fetch' stage of the FDE cycle?
- Address from PC is copied to the MAR
- Instruction held at the address is copied to MDR by the Data Bus
- Simultaneously, the contents of the PC are increased by 1
28
What happens in the registers during the 'Decode' stage of the FDE cycle?
- The contents of the CIR are split into operand and opcode
29
What happens in the registers during the 'Execute' stage of the FDE cycle?
- The decoded instruction is executed
30
What is the System Clock?
- An electronic device that generates signals, switching between 0 and 1
31
What is Clock Speed?
- The time taken for one clock cycle to complete
32
What is a Core?
- An independent processor that is able to run its own FDE cycle
- A computer with multiple cores can complete more than one FDE at any given time
33
What programs can utilise multiple Cores?
- Not all programs are able to utilise multiple cores efficiently as they have not been designed to do so
- Executing tasks faster may not always be possible
34
What is Level 1 Cache?
- Very fast memory cells with a small capacity (2 - 64KB)
35
What is Level 2 Cache?
- Relatively fast memory cells with a medium sized capacity (256KB - 2MB)
36
What is Level 3 Cache?
- Much larger and slower memory cell
37
What is Pipelining?
- The process of completing FDE cycles of three separate instructions simultaneously, holding appropriate data in a buffer in close proximity to the CPU until it's required
38
What is the purpose of Pipelining?
- Aimed to reduce the amount of CPU which is kept idle
39
What is Instruction Pipelining?
- Separating out the instruction into Fetching, Decoding, and Executing
40
What is Arithmetic Pipelining?
- Breaking down the arithmetic operations and overlapping them as they are performed
41
What does Von Neumann Architecture include?
- Basic components of the computer and processor:
- Single CPU
- ALU
- Registers
- Memory Units
42
What concept is Von Neumann Architecture built upon?
- The stored program concept
43
What Buses are used in Von Neumann Architecture?
- A shared Memory and Data Bus is used for both Data and Instructions
44
What is the main feature of Harvard Architecture?
- Physically separate memories for Instructions and Data
45
What is Harvard Architecture commonly used with?
- Embedded processors
46
When is it useful to utilise Harvard Architecture?
- When Memories have different characteristics
- i.e. Instructions may be read only, while Data may be read-write
47
What does Harvard Architecture allow for?
- The optimisation of the size of individual memory cells and their Buses depending on needs
- i.e. The Instruction Memory can be designed to be larger so a larger word size can be used for Instructions
48
What is the first advantage of Von Neumann Architecture?
- Cheaper to develop as the CU is easier to design
49
What is the second advantage of Von Neumann Architecture?
- Programs can be optimised in size
50
What is the first advantage of Harvard Architecture?
- Quicker execution as Data and Instructions can be fetched in parallel
51
What is the second advantage of Harvard Architecture?
- Memories can be different sizes, which can make more efficient use of space
52
What is Contemporary Architecture (Contemporary Processing)?
- The use of a combination of Von Neumann and Harvard Architecture
53
When is Von Neumann Architecture used in Contemporary Architecture (Contemporary Processing)?
- When working with Data and Instructions in main memory
54
What is Harvard Architecture used for in Contemporary Architecture (Contemporary Processing)?
- To divide the Cache into Instruction Cache and Data Cache
