1.1.1 structure and function of the processor

Question 1

what does the ALU do

Answer 1

completes all the arithmetic and logical operations

Question 2

what is a register

Answer 2

small memory cells that operate at high speeds

Question 2

what is the CU

Answer 2

a part of the processor that directs operations of the CPU.

Directs flow of data between the
CPU and other devices.

It sends control signals to other parts of the CPU. e.g read or write signals to memory

Sends memory read and write requests to main memory on the control bus, as well as other command and control signals such as bus requests, bus grants, interrupt requests, etc.

Question 3

What does the PC do

Answer 3

Holds the address of the next instruction to be executed.

• This could be:

the next instruction in a sequence of instructions; or

the address to jump to if the current instruction is a
command to jump or branch - this would be copied from the current Instruction register.

Question 3

what does the MAR do

Answer 3

This holds the address of the memory location from which data; or an instruction
is to be fetched or data is to be written.

• Sends these address to memory down the address bus.

Question 4

what does the MDR do

Answer 4

temporarily stores the data that has been read or data that needs to be written

All data to and from memory must travel down the data bus and pass through the MDR.

Question 5

what does the CIR

Answer 5

holds the current instruction being executed
divided up into the operand and opcode

The contents of the MDR are copied to the CIR if it is an instruction.

Question 6

what is a bus

Answer 6

a set of parallel wires connecting two or more components together.

Question 7

what is a systems bus

Answer 7

the collection of the data bus, address bus and control bus is called the system bus

Question 8

what is the width of the bus

Answer 8

the number of parallel wires it has

Question 9

what is a data bus

Answer 9

a bidirectional bus used to transport data and instructions between components

Carries the binary 1s and Os that make up the actual information being transmitted around the CPU/computer.

Question 10

what is a control bus

Answer 10

the bi-directional bus used to transmit control signals between internal and external components

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Carries command and control signals to and from every other component of the CPU/computer.

Question 11

what is the address bus used for

Answer 11

used to transfer the memory address specifying where data is to be sent and retrieved from

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Carries memory addresses that identify where the data is being read from or written to.

Question 12

what does adding a wire to the address bus do to the number of addressable locations.

Answer 12

it doubles number of addressable locations

Question 13

what does bus request indicate

Answer 13

indicates a device is requesting access to the data bus

Question 14

what does a bus grant indicate

Answer 14

indicates the CPU has granted access to the data bus

Question 15

what does memory write do

Answer 15

causes the data in the data bus to be written into the addressed location.

Question 16

what does memory read do

Answer 16

causes the data from the addressed location to be placed onto the data bus

Question 17

what does the interrupt control signal indicate

Answer 17

indicates that a device is requesting access to the CPU

Question 18

what is the clock control signal for

Answer 18

it is used to synchronize instructions

Question 19

what is assembly language

Answer 19

assembly language is a programming language where mnemonics are used to represent instructions

Question 20

what is opcode

Answer 20

opcode is used to determine the type of instruction and what hardware to use to execute it.

Question 21

what is operand

Answer 21

the operand is the address of where the operation is preformed

Question 22

what occurs during the fetch phase

Answer 22

The Program Counter (PC) holds the address of the next instruction to be fetched.

This address is copied into the Memory Address Register (MAR).

The address bus carries this address to main memory (RAM).

The control unit sends a read signal to memory.

The instruction stored at that memory address is sent via the data bus to the Memory Data Register (MDR).

The instruction is then copied from the MDR to the Current Instruction Register (CIR).

The Program Counter is incremented by 1 to point to the next instruction in memory.

Question 23

what occurs during the decode phase

Answer 23

The instruction in the Current Instruction Register (CIR) is sent to the Control Unit (CU). The Control Unit interprets (decodes) the instruction to determine: What operation is required (e.g. ADD, LOAD, STORE) What operands or registers are involved If needed, the Control Unit generates control signals to coordinate the movement of data or trigger the correct parts of the CPU (e.g. ALU, registers). The opcode and operand(s) are separated: Opcode tells the CPU what action to perform Operand(s) provide the data or address the instruction will use

Question 24

what occurs during the execute phase

Answer 24

the opcode is executed on the data

Question 25

what is clock speed

Answer 25

the number of clock cycles completed per second

Question 26

what is cache memory

Answer 26

cache memory is the CPUs onboard memory which can be accessed a lot faster than main memory

Question 27

what is pipelining

Answer 27

the process of completing the fetch, decode and execute of three separate instructions simultaneously

Question 28

what is the von Neumann architecture

Answer 28

there is a single shared memory and shared data bus for both data and instructions. -Instructions and data are stored in the same format. -A single control unit or processor follows a linear fetch, decode, execute cycle. -One instruction at a time. -Registers are used as fast access to instructions and data.

Question 29

what is Harvard architecture

Answer 29

architecture in which there is two separate memory and data buses for data and instructions. -Instructions and data stored in separate memory units. -Each has its own bus. -Reading and writing data can be done at the same time as fetching an instruction. -Used by RISC processors.

Question 30

what is contemporary processing

Answer 30

processing in which von Neumann architecture is used for main memory. Cache uses Harvard architecture, divided into instruction cache and data cache.

Question 31

number of cores

Answer 31

a core in very simple terms is a complete copy of a CPU. CPUs with multiple cores have much more power to run multiple programs at the same time

Question 32

Accumulator

Answer 32

One of a number of general-purpose registers that modern CPUs have. Data or control information is often stored in them. A CPU may have many general-purposes registers for storing temporary data while instructions or calculations are being carried out Typically, the more general-purpose registers a processor has, the faster it may operate. The results of calculations carried out by the ALU can be temporarily stored here.

Question 33

Why is pipelining good

Answer 33

Without pipelining the various different steps in the F-D-E cycle have to take place one after the other. Not efficient use of memory By using pipelining the next instruction can be fetched while, at the same time, the processor is performing arithmetic or logic operations in the ALU for a previous instruction. In this way we can make efficient use of the various registers and on board CPU cache and it allows different parts of instructions across multiple stages to be held in different registers at the same time