1.1.1 structure and function of the processor Flashcards
what does the ALU do
completes all the arithmetic and logical operations
what is a register
small memory cells that operate at high speeds
what is the CU
a part of the processor that directs operations of the CPU
Directs flow of data between the
CPU and other devices.
Sends memory read and write requests to main memory on the control bus, as well as other command and control signals such as bus requests, bus grants, interrupt requests, etc.
What does the PC do
Holds the address of the next instruction to be executed.
• This could be:
the next instruction in a sequence of instructions; or
the address to jump to if the current instruction is a
command to jump or branch - this would be copied from the current Instruction register.
what does the MAR do
This holds the address of the memory location from which data; or an instruction
is to be fetched or data is to be written.
• Sends these address to memory down the address bus.
what does the MDR do
temporarily stores the data that has been read or data that needs to be written
All data to and from memory must travel down the data bus and pass through the MDR.
what does the CIR
holds the current instruction being executed
divided up into the operand and opcode
The contents of the MDR are copied to the CIR if it is an instruction.
what is a bus
a set of parallel wires connecting two or more components together.
what is a systems bus
the collection of the data bus, address bus and control bus is called the system bus
what is the width of the bus
the number of parallel wires it has
what is a data bus
a bidirectional bus used to transport data and instructions between components
Carries the binary 1s and Os that make up the actual information being transmitted around the CPU/computer.
what is a control bus
the bi-directional bus used to transmit control signals between internal and external components
Craig n dave
Carries command and control signals to and from every other component of the CPU/computer.
what is the address bus used for
used to transfer the memory address specifying where data is to be sent and retrieved from
Craig n dave
Carries memory addresses that identify where the data is being read from or written to.
what does adding a wire to the address bus do to the number of addressable locations.
it doubles number of addressable locations
what does bus request indicate
indicates a device is requesting access to the data bus
what does a bus grant indicate
indicates the CPU has granted access to the data bus
what does memory write do
causes the data in the data bus to be written into the addressed location.
what does memory read do
causes the data from the addressed location to be placed onto the data bus
what does the interrupt control signal indicate
indicates that a device is requesting access to the CPU
what is the clock control signal for
it is used to synchronize instructions
what is assembly language
assembly language is a programming language where mnemonics are used to represent instructions
what is opcode
opcode is used to determine the type of instruction and what hardware to use to execute it.
what is operand
the operand is the address of where the operation is preformed
what occurs during the fetch phase
- the address from the pc is copied to the MAR
-instruction held at that address is copied to the MDR via data bus the pc then increments by 1
-value of MDR is copied to the CIR
what occurs during the decode phase
The content of the CIR is split into the opcode and operand
what occurs during the execute phase
the opcode is executed on the data
what is clock speed
the number of clock cycles completed per second
what is cache memory
cache memory is the CPUs onboard memory which can be accessed a lot faster than main memory
what is pipelining
the process of completing the fetch, decode and execute of three separate instructions simultaneously
what is the von Neumann architecture
there is a single shared memory and shared data bus for both data and instructions.
- Shared memory space for instructions and data.
-Instructions and data are stored in the same format.
-A single control unit or processor follows a linear fetch, decode, execute cycle.
-One instruction at a time.
-Registers are used as fast access to instructions and data.
what is Harvard architecture
architecture in which there is two separate memory and data buses for data and instructions.
-Instructions and data stored in separate memory units.
-Each has its own bus.
-Reading and writing data can be done at the same time as fetching an instruction.
-Used by RISC processors.
what is contemporary processing
processing in which von Neumann architecture is used for main memory. Cache uses Harvard architecture, divided into instruction cache and data cache.
number of cores
a core in very simple terms is a complete copy of a CPU.
CPUs with multiple cores have much more power to run multiple programs at the same time
Accumulator
One of a number of general-purpose registers that modern CPUs have.
Data or control information is often stored in them.
A CPU may have many general-purposes registers for storing temporary data while instructions or calculations are being carried out
Typically, the more general-purpose registers a processor has, the faster it may operate.
The results of calculations carried out by the ALU can be temporarily stored here.
Why is pipelining good
Without pipelining the various different steps in the F-D-E cycle have to take place one after the other.
Not efficient use of memory
By using pipelining the next instruction can be fetched while, at the same time, the processor is performing arithmetic or logic operations in the ALU for a previous instruction.
In this way we can make efficient use of the various registers and on board
CPU cache and it allows different parts of instructions across multiple stages to be held in different registers at the same time
