1.1.1 Structure and Function of the Processor Flashcards
What is the Control Unit?
A part of the processor which directs operations inside the CPU.
What does the ALU (Arithmetic Logic Unit) do?
The ALU completes all the arithmetical and logical operations.
What does the PC (Program Counter) do?
The PC counter stores the address of the next instruction.
What does the ACC (Accumulator) do?
The ACC stores the result of calculations made by the ALU
What does the MAR (Memory Address Register) do?
The MAR stores the addresses used when searching for data in RAM
What does the MDR (Memory Data Register) do?
The MDR acts as buffer when reading/writing to memory
What does the CIR (Current Instruction Register) do?
The CIR holds the current instruction divided into opcode and operand.
What is a bus?
A set of parallel wires connecting two or more components together.
What is the system bus?
The system bus is a collective term for address, data and control bus
What is the width of a bus?
The number of parallel wires it has.
What is the data bus?
A bi-directional bus used to transport data and instructions between components.
What is the control bus?
A bi-directional bus used to transmit control signals between internal and external components.
What is the address bus ?
A one directional bus that transmits memory addresses specifying where the data is to be sent or retrieved from.
What does adding a wire to the address bus do to the number of addressable locations?
It doubles the number of addressable locations
What does memory read indicate?
Causes the data from the addressed location to be placed onto the data bus.
What does memory write indicate?
Causes the data on the data bus to be written into the addressed location
What is operand ?
The operand contains the data or address of the data upon which the operation is to be performed.
What is opcode ?
The opcode specifies the type of instruction to be executed.
What is assembly code?
Assembly code uses mnemonics to represent instructions, for example ADD represents addition
What are 5 steps of the fetch part of the FDE cycle?
- The contents of PC is copied to the MAR
- The contents of MAR is sent across the address bus to RAM
- The control unit sends a read signal across the control bus to RAM
- The value in the PC is copied to the ALU where one is added, then the value from the ALU is copied to the PC
- Data is gotten from the memory address of the MAR and travels along a data bus to the MDR where the value is updated to the data from the MAR.
What step is done in the decode part of the FDE cycle?
- The data from the MDR goes to the CIR where it is split up to the instruction and location.
What are 6 steps of the execute part of the FDE cycle?
- The address from the MAR is sent via the address bus to RAM
- A read signal is sent from the CU via the control bus to RAM
- The data from the memory location sent by MAR is copied to the MDR via the data bus
- The data from the ACC and the MDR are both copied to the ALU
- A numerical operation occurs
- The result is copied to the ACC
What is clock speed?
The number of clock cycles completed per second/ the number of instructions a CPU can process per second
What is cache memory?
Cache memory is the CPU’s onboard memory which can be accessed a lot faster than main memory.
What is faster and smaller in size level 1 cache or level 3 cache?
Level 1 cache
What is a core?
A core is an independent processor that is able to run its own fetch-execute cycle.
Why does doubling the amount of cores not always double the speed of the processor?
Not all programs are able to utilise multiple cores efficiently as they have not been designed to do so.
What is pipelining?
The process of completing the fetch, decode and execute of three separate instructions simultaneously.
What is Von Neumann architecture?
Single control unit
One instruction at a time
Uses fetch execute cycle
Program & data stored together
What is Harvard architecture?
instructions and data are stored in separate memory units
instructions and data are each served by their own buses
allows for pipelining
