1.1.1 Structure and Function of the Processor

Question 1

What is the Control Unit?

Answer 1

A part of the processor which directs operations inside the CPU.

Question 2

What does the ALU (Arithmetic Logic Unit) do?

Answer 2

The ALU completes all the arithmetical and logical operations.

Question 3

What does the PC (Program Counter) do?

Answer 3

The PC counter stores the address of the next instruction.

Question 4

What does the ACC (Accumulator) do?

Answer 4

The ACC stores the result of calculations made by the ALU

Question 5

What does the MAR (Memory Address Register) do?

Answer 5

The MAR stores the addresses used when searching for data in RAM

Question 6

What does the MDR (Memory Data Register) do?

Answer 6

The MDR acts as buffer when reading/writing to memory

Question 7

What does the CIR (Current Instruction Register) do?

Answer 7

The CIR holds the current instruction divided into opcode and operand.

Question 8

What is a bus?

Answer 8

A set of parallel wires connecting two or more components together.

Question 9

What is the system bus?

Answer 9

The system bus is a collective term for address, data and control bus

Question 10

What is the width of a bus?

Answer 10

The number of parallel wires it has.

Question 11

What is the data bus?

Answer 11

A bi-directional bus used to transport data and instructions between components.

Question 12

What is the control bus?

Answer 12

A bi-directional bus used to transmit control signals between internal and external components.

Question 13

What is the address bus ?

Answer 13

A one directional bus that transmits memory addresses specifying where the data is to be sent or retrieved from.

Question 14

What does adding a wire to the address bus do to the number of addressable locations?

Answer 14

It doubles the number of addressable locations

Question 15

What does memory read indicate?

Answer 15

Causes the data from the addressed location to be placed onto the data bus.

Question 16

What does memory write indicate?

Answer 16

Causes the data on the data bus to be written into the addressed location

Question 17

What is operand ?

Answer 17

The operand contains the data or address of the data upon which the operation is to be performed.

Question 18

What is opcode ?

Answer 18

The opcode specifies the type of instruction to be executed.

Question 19

What is assembly code?

Answer 19

Assembly code uses mnemonics to represent instructions, for example ADD represents addition

Question 20

What are 5 steps of the fetch part of the FDE cycle?

Answer 20

1. The contents of PC is copied to the MAR
2. The contents of MAR is sent across the address bus to RAM
3. The control unit sends a read signal across the control bus to RAM
4. The value in the PC is copied to the ALU where one is added, then the value from the ALU is copied to the PC
5. Data is gotten from the memory address of the MAR and travels along a data bus to the MDR where the value is updated to the data from the MAR.

Question 21

What step is done in the decode part of the FDE cycle?

Answer 21

6. The data from the MDR goes to the CIR where it is split up to the instruction and location.

Question 22

What are 6 steps of the execute part of the FDE cycle?

Answer 22

7. The address from the MAR is sent via the address bus to RAM
8. A read signal is sent from the CU via the control bus to RAM
9. The data from the memory location sent by MAR is copied to the MDR via the data bus
10. The data from the ACC and the MDR are both copied to the ALU
11. A numerical operation occurs
12. The result is copied to the ACC

Question 23

What is clock speed?

Answer 23

The number of clock cycles completed per second/ the number of instructions a CPU can process per second

Question 24

What is cache memory?

Answer 24

Cache memory is the CPU’s onboard memory which can be accessed a lot faster than main memory.

Question 25

What is faster and smaller in size level 1 cache or level 3 cache?

Answer 25

Level 1 cache

Question 26

What is a core?

Answer 26

A core is an independent processor that is able to run its own fetch-execute cycle.

Question 27

Why does doubling the amount of cores not always double the speed of the processor?

Answer 27

Not all programs are able to utilise multiple cores efficiently as they have not been designed to do so.

Question 28

What is pipelining?

Answer 28

The process of completing the fetch, decode and execute of three separate instructions simultaneously.

Question 29

What is Von Neumann architecture?

Answer 29

Single control unit
One instruction at a time
Uses fetch execute cycle
Program & data stored together

Question 30

What is Harvard architecture?

Answer 30

instructions and data are stored in separate memory units
instructions and data are each served by their own buses
allows for pipelining