1.1.1 Structure and Function of the Processor

Question 1

What does the ALU do?

Answer 1

The ALU (Arithmetic and Logic Unit) completes all of the arithmetical and logical
operations.

Question 2

What are the arithmetic operations?

Answer 2

Arithmetical operations include all mathematical operations such as addition
and subtraction on fixed or floating point numbers

Question 3

What are the logical operations?

Answer 3

Logical operations include boolean logic operations such as AND, OR, NOT, and XOR.

Question 4

What does the Control Unit do?

Answer 4

It directs the operations of the CPU.

Question 5

Give 5 roles of the CU

Answer 5

• Controlling and coordinating the activities of the CPU
• Managing the flow of data between the CPU and other devices
• Accepting the next instruction
• Decoding instructions
• Storing the resulting data back in memory

Question 6

What are registers?

Answer 6

Registers are small memory cells that operate at a very high speed. They are used to temporarily store data.

Question 7

What happens in registers?

Answer 7

All arithmetic, logical and shift operations

Question 8

What the PC do?

Answer 8

Holds the address of the next instruction to

be executed.

Question 9

What does the ACC do?

Answer 9

Stores the results from calculations.

Question 10

What does the MAR do?

Answer 10

Holds the address of a location that is to be

read from or written to.

Question 11

What does the MDR do?

Answer 11

Temporarily stores data that has been read

or data that needs to be written.

Question 12

What does the CIR do?

Answer 12

Holds the current instruction being
executed, divided up into operand and
opcode

Question 13

What are buses?

Answer 13

Buses are a set of parallel wires which connect two or more components inside the CPU

Question 14

What buses do the CPU have? - What are they collectively called.

Answer 14

data bus, control bus, and address bus. These buses

collectively are called the system bus.

Question 15

What is the width of a bus?

Answer 15

The number of parallel wires the bus has. The width of the bus is directly proportional to the number of bits that can be transferred simultaneously at any given time. Buses are typically 8, 16, 32 or 64 wires wide.

Question 16

What is the data bus?

Answer 16

This is a bi-directional bus, used for transporting data and instructions between components.

Question 17

What is the address bus?

Answer 17

This is the bus used to transmit the memory addresses specifying where data is to be sent
to or retrieved from.

Question 18

What is the width of the address bus?

Answer 18

It is proportional to the number of

addressable memory locations.

Question 19

What is the control bus?

Answer 19

This is a bi-directional bus used to transmit control signals between internal and external
components. The control bus coordinates the use of the address and data buses and
provides status information between system components.

Question 20

What are the 6 control signals?

Answer 20

Bus request, bus grant, memory write, memory read, interrupt request, clock.

Question 21

How does assembly code represent instructions?

Answer 21

Assembly code uses mnemonics to represent instructions,
for example ADD represents addition. This is a simplified
way of representing machine code.

Question 22

What is an instruction made of?

Answer 22

The operand, which contains the data or the address of the data upon which the operation is to be performed.
The opcode, which specifies the type of instruction to
be executed.

Question 23

What is pipelining?

Answer 23

Pipelining is the process of completing the fetch, decode, and execute cycles of three
separate instructions simultaneously, holding appropriate data in a buffer in close proximity
to the CPU until it’s required. While one instruction is being executed, another can be
decoded and another fetched.

Question 24

What does pipelining aim to do?

Answer 24

Pipelining is aimed to reduce the amount of the CPU which is kept idle

Question 25

What is instruction pipelining?

Answer 25

Separating out the

instruction into fetching, decoding, and executing

Question 26

What is arithmetic pipelining?

Answer 26

Arithmetic pipelining is breaking down

the arithmetic operations and overlapping them as they are performed.

Question 27

What happens in the Fetch phase?

Answer 27

• Address from the PC is copied to the MAR
• Instruction held at that address is copied to MDR by the data bus
• Simultaneously, the contents of the PC are increased by 1
• The value held in the MDR is copied to the CIR

Question 28

What happens in the Decode phase?

Answer 28

• The contents of CIR are split into operand and opcode

Question 29

What happens in the Execute phase?

Answer 29

• The decoded instruction is executed

Question 30

What is the system clock?

Answer 30

This is an electronic device which
generates signals, switching between 0 and 1. All processor activities begin on a clock
pulse, and each CPU operation starts as the clock changes from 0 to 1.

Question 31

What is the clock speed?

Answer 31

The clock speed is

the time taken for one clock cycle to complete

Question 32

What is a core?

Answer 32

A core is an independent processor that is able to run its own fetch-execute cycle

Question 33

Explain the concept of multiple cores?

Answer 33

A computer with multiple cores can complete more than one fetch-execute cycle at any given
time. A computer with dual cores can theoretically complete tasks twice as fast as a computer with a single core. However, not all programs have been designed to utilise multiple cores.

Question 34

What is cache memory?

Answer 34

Cache memory is the CPU’s onboard memory. Instructions fetched from main memory are copied to the cache so if they are required again they can be accessed quicker.
As cache fills up, unused instructions are replaced.

Question 35

What is L1 cache?

Answer 35

Very fast memory cells with a small

capacity. (2-64KB)

Question 36

What is L2 cache?

Answer 36

Relatively fast memory cell, with a medium

sized capacity. (256KB-2MB)

Question 37

What is L3 cache?

Answer 37

Much larger and slower memory cell.

Question 38

What are the basic components of the computer and processor?

Answer 38

Single control unit
ALU
Registers
Memory units

Question 39

What is the Von Neumann architecture?

Answer 39

This architecture includes the basic components, as well as a shared memory and shared data bus for data and instructions.

Question 40

What is the Harvard architecture?

Answer 40

This architecture has separate memories for instructions and data, commonly used with embedded processors.

Question 41

When is Harvard architecture useful?

Answer 41

When memories have different characteristics, like read-only instructions and read-write data. Used in embedded systems and microcontrollers.

Question 42

Why is Von Neumann better?

Answer 42

Cheaper to develop as the control unit is easier to design.

Programs can be optimised in size.

Question 43

Why is Harvard better?

Answer 43

Quicker execution as data and instructions can be fetched in parallel.
Memories can be different sizes, making more efficient use of space.

Question 44

What do contemporary processors use?

Answer 44

Von Neumann when working with data and instructions in main memory, but Harvard to divide the cache into instruction cache and data cache.