1.1 Structure/Function Of The Processor Flashcards
What are the components of the CPU?
arithmetic logic unit
control unit
registers
cache memory
What is the purpose of the ALU?
Performs all of the arithmetic calculations and logical operations of the CPU. This includes +- AND/OR/NOT etc.
What is the purpose of the CU?
- Controls and coordinates the activities of the CPU
- Manages the flow of data between the CPU and memory
- Accepts and decodes instructions
What are registers?
Small memory cells that operate at very high speeds and temporarily store data.
What are the special purpose registers in the CPU?
Program Counter
Memory Address Register
Memory Data Register
Current Instruction Register
Accumulator
What does the PC do?
Stores the address of the next instruction to be executed, automatically increments by 1 unless told otherwise.
What does the MAR do?
Stores the address of the location in memory that is to be read from/written to.
What does the MDR do?
Stores data that has been read from or is going to be written to main memory.
What does the current instruction register do?
Stores the current instruction being executed, divided into opcode and operand.
What does the accumulator do?
Stores the result of the ALU’s calculations.
What is a bus?
A set of parallel wires that transfers data between CPU components as well as to/from external components such as memory.
What are the 3 buses in the CPU?
data bus
address bus
control bus
What does the data bus do?
Transports data/instructions between components bi-directionally.
What does the address bus do?
Transmits memory addresses specifying where data is to be read from or written to.
What does the control bus do?
Transmits control signals between components, this includes:
- bus request
- bus grant
- memory write
- memory read
- interrupt request
- clock signals to synchronise operations
What is the operand?
The data or address of the data upon which the operation is to be performed.
What is the opcode?
The type of instruction to be executed.
What is pipelining?
Fetching one instruction, while decoding another, and executing another in order to carry out 3 fde cycles simultaneously and stop CPU components from being idle.
When can pipelining not be used?
When there is a branch instruction, the pipeline has to be flushed as the next instruction to fetch is not the next instruction in memory.
What happens in the fetch phase?
- PC address copied to MAR
- PC contents increment by 1 unless instructed otherwise
- data in memory at MAR address is copied to the MDR
- contents of the MDR is copied to the CIR
What happens in the decode phase?
The control unit splits the data in the CIR into opcode/operand.
What 3 factors affect CPU performance?
clock speed
NO. cores
amount/type of cache memory
How does clock speed impact CPU performance?
The system clock generates clock signals to synchronise the execution of instructions. The higher the clock speed, the more fde cycles that can be carried out per second.
How does the number of cores impact CPU performance?
The CPU can carry out multiple fde cycles simultaneously if it contains multiple cores. However, most programs can’t make efficient use of all CPU cores so double the cores is not typically double the processing speed.
