1.1 Structure/Function Of The Processor

Question 1

What are the components of the CPU?

Answer 1

arithmetic logic unit
control unit
registers
cache memory

Question 2

What is the purpose of the ALU?

Answer 2

Performs all of the arithmetic calculations and logical operations of the CPU. This includes +- AND/OR/NOT etc.

Question 3

What is the purpose of the CU?

Answer 3

• Controls and coordinates the activities of the CPU
• Manages the flow of data between the CPU and memory
• Accepts and decodes instructions

Question 4

What are registers?

Answer 4

Small memory cells that operate at very high speeds and temporarily store data.

Question 5

What are the special purpose registers in the CPU?

Answer 5

Program Counter
Memory Address Register
Memory Data Register
Current Instruction Register
Accumulator

Question 6

What does the PC do?

Answer 6

Stores the address of the next instruction to be executed, automatically increments by 1 unless told otherwise.

Question 7

What does the MAR do?

Answer 7

Stores the address of the location in memory that is to be read from/written to.

Question 8

What does the MDR do?

Answer 8

Stores data that has been read from or is going to be written to main memory.

Question 9

What does the current instruction register do?

Answer 9

Stores the current instruction being executed, divided into opcode and operand.

Question 10

What does the accumulator do?

Answer 10

Stores the result of the ALU’s calculations.

Question 11

What is a bus?

Answer 11

A set of parallel wires that transfers data between CPU components as well as to/from external components such as memory.

Question 12

What are the 3 buses in the CPU?

Answer 12

data bus
address bus
control bus

Question 13

What does the data bus do?

Answer 13

Transports data/instructions between components bi-directionally.

Question 14

What does the address bus do?

Answer 14

Transmits memory addresses specifying where data is to be read from or written to.

Question 15

What does the control bus do?

Answer 15

Transmits control signals between components, this includes:
- bus request
- bus grant
- memory write
- memory read
- interrupt request
- clock signals to synchronise operations

Question 16

What is the operand?

Answer 16

The data or address of the data upon which the operation is to be performed.

Question 17

What is the opcode?

Answer 17

The type of instruction to be executed.

Question 18

What is pipelining?

Answer 18

Fetching one instruction, while decoding another, and executing another in order to carry out 3 fde cycles simultaneously and stop CPU components from being idle.

Question 19

When can pipelining not be used?

Answer 19

When there is a branch instruction, the pipeline has to be flushed as the next instruction to fetch is not the next instruction in memory.

Question 20

What happens in the fetch phase?

Answer 20

• PC address copied to MAR
• PC contents increment by 1 unless instructed otherwise
• data in memory at MAR address is copied to the MDR
• contents of the MDR is copied to the CIR

Question 21

What happens in the decode phase?

Answer 21

The control unit splits the data in the CIR into opcode/operand.

Question 22

What 3 factors affect CPU performance?

Answer 22

clock speed
NO. cores
amount/type of cache memory

Question 23

How does clock speed impact CPU performance?

Answer 23

The system clock generates clock signals to synchronise the execution of instructions. The higher the clock speed, the more fde cycles that can be carried out per second.

Question 24

How does the number of cores impact CPU performance?

Answer 24

The CPU can carry out multiple fde cycles simultaneously if it contains multiple cores. However, most programs can’t make efficient use of all CPU cores so double the cores is not typically double the processing speed.

Question 25

What is a core?

Answer 25

An independent processing unit within the CPU that can carry out its own fde cycle.

Question 26

How does cache memory improve CPU performance?

Answer 26

Cache memory stores recently/commonly used instructions so that they can be fetched quicker if needed again. This speeds up the processing of instructions as cache memory is easier for the CPU to access than RAM but cache is much lower capacity.

Question 27

What are the types of cache from quickest to slowest?

Answer 27

L1 - quickest but smallest
L2
L3 - slowest but largest

Question 28

What are 2 types of computer architecture?

Answer 28

von neumann
harvard

Question 29

What are the features of von neumann architecture?

Answer 29

• CPU contains registers, CU, ALU
• A shared memory and data bus is used for both data/instructions
• instructions are executed sequentially

Question 30

What are the features of harvard architecture?

Answer 30

• separate memories used for data/instructions
• instructions may be stored in ROM
• separate buses used for transmitting data/instructions

Question 31

What are the advantages of von neumann architecture?

Answer 31

• cheaper to develop as the control unit is easier to design
• programs can be optimised in size
• more simple/flexible

Question 32

What are the advantages of harvard architecture?

Answer 32

• data and instructions can be fetched in parallel
• memories can be different sizes to make more efficient use of space

Question 33

Which architecture do contemporary processors use?

Answer 33

A combination of both. Data and instructions are both stored in main memory but there is separate cache for data/instructions.