1.1 CPU and embedded systems Flashcards
Fetch stage
The CPU retrieves the next instruction from main memory (RAM) based on the address stored in the Program Counter (PC).
The PC increments to hold the memory address of the next instruction to be fetched.
The address in the PC is copied to the Memory Address Register (MAR).
The instruction is sent from the memory address (held in MAR) to the Memory Data Register (MDR).
The instruction is then transferred from the MDR to the Current Instruction Register (CIR).
Decode stage
The CU decodes the instruction
Execute stage
The CPU carries out the operation specified in the decoded instruction.
This may involve arithmetic calculations, data movement, or other actions.
The results of the execution are typically stored in the Accumulator (ACC) or another register.
Registers
Extremely small, extremely fast memory located in the CPU
Each register has its very own specific purpose
Things that aren’t registers
ALU
Cache
CU
ALU
Performs any arithemetic or logical calculations
CU
Coordinantes data. Controls the flow of data. Decodes instructions.
Cache
Very small and fast memory that stores frequently used data.
Prevents CPU from continuously having to fetch frequently used daya and instructions from RAM.
More cache
Accumulator
Stores the resuslt of calculations
MDR
Stores data fetched from memory
MAR
Holds address of where data is to be fetched from
PC
Holds address of next instruction
Clock speed
Number of FDE cycles per second (Hz)
The faster the clock speed, the more instructions can be fetched and executed per second
Cache size
Temporary storage for quick access to frequently used instructions.
Increased cache size means less data is fetched from RAM. This increased read and write speed.
Cores
Multiple processing units. Simultaneous FDE cycles. Speed depends on clock speed.
Embedded systems
Computer with a dedicated function
Within a larger system.
* Small
* Use less power
* Lower cost
