09 - Flash Memory Flashcards
What is Flash Memory?
is an electronic (solid-state) non-volatile computer memory storage medium that can be electrically erased and reprogrammed. The two main types of flash memory are named after the NAND and NOR logic gates. A flash memory device typically consists of one or more flash memory chips (each holding many flash memory cells) along with a separate flash memory controller chip. One key disadvantage of flash memory is that it can only endure a relatively small number of write cycles in a specific block.
What are the two common types of Flash memory?
NOR
NAND
What is a Multi Chip Package (MCP)?
NAND as flash memory and DRAM for running the operating code are stacked into a so called Multi Chip Package (MCP), with one physical footprint.
What is the Floating Gate Transistor?
Flash memory stores information in an array of memory cells made from floating-gate transistors. In single-level cell (SLC) devices, each cell stores only one bit of information. Multi-level cell (MLC) devices, including triple-level cell (TLC) devices, can store more than one bit per cell.
The flash chip’s cells are arranged in a grid that has a transistor at each intersection. Each transistor has two gates: one is known as a floating gate, and the other one is called a control gate. The two gates are separated from each other by a thin dielectric material generally referred to as the oxide layer. Because the floating gate is electrically isolated by the oxide layer, any electrons placed on it are trapped there. This is what makes flash memory nonvolatile.
Explain SLC, MLC & TLC?
- Single Level Cell (SLC) : Stores one bit of data per cell. Programmed (0) or erased (1). The state is determined by the level of charge applied to the cell. 100’000 write cycles per cell. Applications that need the best possible performance should use single-level cell flash. It is the fastest, most reliable, longest lasting and most expensive type of NAND flash.
- Multi Level Cell (MLC) : Stores two bits per cell. Offers higher capacity and lower cost than SLC. 10’000 write cycles per cell. MLC is slower and has a higher rate of data corruption. Because MLC stores multiple bits per cell, it has more wear during write operations and therefore requires more wear-leveling, which slows performance and causes it to wear out faster.
- Tri Level Cell (TLC) : Triple-level cell drives put three bits in each cell, so wear levels, error correction, power and cooling are even higher than that of MLC. TLC is best for workloads that are mostly reads, such as web hosting and streaming. They offer increased density, which can bring the price per gigabyte of flash storage closer to that of spinning disk.
What do you know about NOR Memory?
EPROM or EEPROM. Introduced by Intel in 1988. It has a slow erase cycle 900ms. Slow write cycle. Very fast read cycle. Used for system data such. May be directly accessed by processor. More expensive to produce. Shorter performance life than NAND. Erase cycles 10,000 100,000. Less likely to suffer bit flipping. Uses a Memory Technology Driver (MTD) in order to conduct memory operations. Are connected in parallel.
What do you know about NAND Memory?
Toshiba introduced in 1989. Used in other flash media. Fast erase cycle 2ms. Fast read/write cycle. Originally used for program data (pictures, video, audio files etc). High cell density and capacity. Lower in cost than NOR. Requires memory management EDC/ECC. Erase Cycles 100,000 1,000,000. Uses less power for intense operations than NOR. Connected serially. The NAND type is found primarily in memory cards, USB flash drives, solid-state drives (those produced in 2009 or later), and similar products, for general storage and transfer of data.
Explain the difference between NOR and NAND?
NOR flash is faster to read than NAND flash, but it’s also more expensive, and it takes longer to erase and write new data. NAND has a higher storage capacity than NOR. NAND devices are accessed serially, using the same eight pins to transmit control, addressing and data. NAND can write to a single memory address, doing so at eight bits – one byte – at a time.
NOR flash is also more expensive to produce than NAND. That, and its random access function, mean NOR is mostly used for code execution, while NAND is mostly used for data storage. NOR flash is most often used in mobile phones, scientific instruments and medical devices. NAND has found a market in devices to which large files are frequently uploaded and replaced, such as MP3 players, digital cameras and USB flash drives.
Some devices use both NAND and NOR flash. A smartphone or tablet, for instance, may use embedded NOR to boot up the operating system and a removable NAND card for all its other memory or storage requirements.
What are the issues of programming cells?
One limitation of flash memory is that, although it can be read or programmed a byte or a word at a time in a random access fashion, it can be erased only a block at a time. This generally sets all bits in the block to 1. Starting with a freshly erased block, any location within that block can be programmed. However, once a bit has been set to 0, only by erasing the entire block can it be changed back to 1. In other words, flash memory (specifically NOR flash) offers random-access read and programming operations but does not offer arbitrary random-access rewrite or erase operations.
How does the Flash Memory Structure looks like?
Each block consists of a number of pages. The pages are typically 512, 2048 or 4096 bytes in size. Associated with each page are a few bytes (typically 1/32 of the data size) called Spare Area that can be used for storage of an error correcting code (ECC) checksum. A page has a spare area, also called out-of-bound area. It contains bad block marking or error correction control. While reading and programming is performed on a page basis, erasure can only be performed on a block basis.
What is the typical block size?
will vary depending on the size of the memory chip. They typically consists of 32, 64 or 128 pages.
32 Page Block with 512 byte page:
32 x 528 = 16896 = 16 KB
64 Page Block with 2048 byte page:
64 x 2112 = 135168 = 128 KB
128 Page Block with 4096 byte page:
128 x 4224 = 540672 = 512 KB
What is the so called Spare Area?
a.k.a. Out Of Bounds (OOB). Normally between 8-128 bytes in size. Information stored will be flash manufacturer chip specific. NAND Flash memory includes a 64-byte spare area for extra storage on each page (16 bytes per 512-byte sector). This spare area can be used to store the ECC code as well as other software information, such as wear-leveling or logical-to-physical block-mapping information. ECC can be performed in hardware or software; however, hardware implementation provides a performance advantage. Contains information such as erase block, page belongs to, mapping physical page location to logical location.
Hamming Code is the usual ECC (Error Correcting Code) to correct single level cells. BCH (Bose-Chaudhuri-Hocquenghem) code is commonly used for multi level or tri level cell correction.
Explain the difference of:
- First Generation Flash Memory
- Second Generation Flash Memory
- Third Generation Flash Memory
- NOR + RAM
- NOR + RAM + NAND
- NAND + RAM
What does FTL stand for?
Flash Translation Layer. The main goal of FTL is to emulate the functionality of a normal block device with flash memory, hiding the presence of erase operation and erase-before-write characteristics. Two important functions of FTL are address translation and garbage collection. It is critical to implement a NAND Flash Translation Layer (NFTL) to maximize the lifespan of the device. This layer comprises of wear leveling algorithms, bad block management and error control algorithms and thus maximizes the lifespan of a device by redirecting new writes to different physical blocks. It only applies to NAND Flash devices directly attached to the microcontroller.
What is wear levelling?
Due to its architecture, data can be written to an address on a NAND flash memory only a finite number of times. NAND flash memory wears out if data is written too often to the same address, so wear leveling is used to help prolong the life of the NAND flash device. It ensures that data erasures and writes are distributed evenly across the NAND Flash storage medium, so that NAND memory blocks don’t fail prematurely due to a high number of erase cycles.
