03 Information Processing

Question 1

Relays

Answer 1

Switching contacts -> Simplest way to realize regional functions (“voltage present”/”voltage not present”)

• If the switching contacts are actuated by a solenoid coil, this is referred to as a relay.
• Enable one or more contacts to be actuated by an electrical control current over long distances and in inaccessible places
• Relays used to switch higher power devices (motors, heating coils, etc.) are called contactors

Question 2

Transistors

Answer 2

• Bipolar transistors are made of silicon, germanium or mixed crystals, which are widely used or only found in very small concentrations.
• Function: When there is a change in resistance in one layer, the resistance in the other layer is also affected.
• Transistors are mainly used as switches or amplifiers.

Question 3

Layers of Bipolar Transistors

Answer 3

Bipolar transistors consist of three thin semiconductor layers, which are placed on top of each other.

o Middle layer is very thin compared the other two layers
o Outer layers are called collector (C) and emitter (E)
o Middle layer has the designation base (B) and is the control electrode or also the control input of the transistor

Question 4

Differentiation between NPN and PNP transistors

Answer 4

With a PNP transistor, the polarity of all voltages and currents is exactly the other way around compared to the NPN transistor.

Question 5

Bipolar Transistors

Answer 5

• Bipolar transistors are current-controlled -> The resistance formed by the collector (C) and emitter (E) is significantly influenced by the amount of current fed into the base (B).

o Base acts as an actuator for the collector-emitter current (increase of the relatively small current at the base, controls the in return larger current from collector to emitter

o Ratio of collector-emitter current and required base current is called the gain factor
-> The higher the gain factor, the less base current is required to set a desired collector-emitter current

• Bipolar transistors can be used to implement simple logic circuits (e.g. AND or OR gates)

Question 6

Moore’s Law

Answer 6

• In 1965 Gordon Moore predicted that the number of transistors in integrated circuits would double every year
  o Since about 1975, the doubling period has stabilized at about 18 months
  o Chip manufacturers lay out their product plans according to Moore’s law
• Moore’s Law comes up against technical limits, since transistors used are only a few atoms in size
  o Clock speed of modern processors can no longer be increased -> More performance is provided by a higher number of processor cores

Question 7

Structure of Digital Networks: AND-Gate

Answer 7

o Inputs E1 and E2 are connected to the base of the two transistors.
o Output A is connected to the emitter resistor of the lower transistor.
o By connecting a voltage to E1 or E2 one of the transistors is activated.
-> In case of just one of the transistors is activated no current can flow to the output a, it’s set to logic 0.
-> If both transistors are activated because of a voltage at E1 and E2, a current can flow through both transistors

Question 8

Structure of Digital Networks: OR-Gate

Answer 8

o Both transistors are connected in parallel
o Output A is connected to the emitter resistor of both transistors similar to the AND gate.
o If either of the two inputs is connected to a voltage, a current can flow through the emitter resistor and the output a is set to logic 1.

Question 9

Structure of Digital Networks: NOT-Gate

Answer 9

o Input E is connected to the base of the transistor, similar to the other two gates
o Output A is applied behind the collector resistance
o If there is no voltage connected to E, the transistor does not conduct and no current flows. The entire supply voltage is connected to the output A which drops across the collector-emitter oath of the transistor. Thus, the output A is set to logical 1 and the input signal is inverted
o If a voltage is connected to E, the transistor conducts and a current flows through the collector resistor to ground (GND or reference potential). Because of the “conduction” of the transistor the output A is also connected to ground in terms of potential which causes a voltage drop of 0V to be registered. Hence, the output is set to logic 0.

Question 10

Structure of Digital Networks: Switching Functions

Answer 10

o A switching function receives n truth values (0 or 1) at the input and converts these into m logical/truth values
o Gates are connected in such a way that the desired function values are present at the output
o Switching functions are represented with truth tables -> Corresponding interconnection with AND, OR or NOT gates anc thus a switching can be realized.

Question 11

Combinational and Sequential Circuits

Answer 11

o Combinational circuit: A diagram realizing a switching function with logic gates and without clock or feedback (only using links of logic gates).

o Sequential Circuit: Extending the digital network with a clock source and delay elements for storing individual bits.

Question 12

Delay

Answer 12

o 1-bit memory with an integrated delay element.
o Clock supplies a clock pulse for the execution of the actions of a delay

Steps of the delay:
1. Work Phase: After the first clock pulse the content of S is transmitted at the output and is available as signal yi. The signal xi at the input is temporarily stored in V. V and S are seperated by a barrier.
2. Set Phase: A central synchronization (clock), which generates clock pulses, removes

Question 13

Microprocessor Architectures: Harvard Architecture

Answer 13

o The Harvard architecture is a circuit concept in which instruction memory and data memory are logically as well as physically separated from each other.
-> The separation results from different address spaces and machine instructions for accessing instruction data memory -> Central Unit needs to access both individual systems and storages.

o Commands and data can be loaded simultaneously in one clock cycle.  This enables efficient processing of commands

Question 14

Microprocessor Architectures: Von-Neumann Architecture

Answer 14

o Computers based on this architecture are universal, require minimal hardware and can execute variable programs
o Program and data are located in a common memory
o Most of today’s computers are Von Neumann computers (if necessary with minor mods)

Question 15

Main Disadvantage of the Von-Neumann architecture

Answer 15

“Von-Neumann Bottleneck”

-> Connection between memory and processor through which data and program must be transported

 Today most CPUs are faster than the memory -> Data cannot be loaded from memory fast enough
 Counteracting method: Cache data in the CPU (e.g. Heuristically determines which data is needed next and loads it into the CPU’s cache in advance or does not write it back to memory)

Question 16

Pipelining

Answer 16

Efficient processing of instructions in multiple stages

Pipelining accelerates the process through processing instructions in several cascaded stages
 After processing a step (fetch, decode or execute), the result is passed on to the next stage and the next instruction is loaded
 All instructions must be simple enough to be processed in one cycle

Question 17

Pipelining: Stages

Answer 17

1. Fetch
2. Decode
3. Execute
4. Write Back

Question 18

Simple Arithmetic Logic Unit (ALU)

Answer 18

An ALU calculates arithmetic and logical functions and is a central part of processors

Supports at least the following minimal operations
 Addition
 Negation
 Conjunction (AND operation)
 Right and left shift

Question 19

Additional Arithmetic Operations of an ALU

Answer 19

• Increment and decrement
• Subtraction
• Comparison
• Multiplication
• Division

Question 20

Additional Logic Operations of an ALU

Answer 20

• Disjunction (OR operation)
• Contravelence (exclusive OR operation)
• Left and right rotation
• Register Manipulation and bit changes

Question 21

Half Adder

Answer 21

Central component of an ALU

Half adders are used for the addition of two 1-bit numbers -> Sum is created by linking the two inputs A and B with an XOR gate
* The carry is created by linking two inputs with an AND gate

Question 22

Full Adder

Answer 22

Central component of an ALU

Full adders are used for the addition of three 1-bit numbers -> Can be composed of two half adders

• The carry results from a check whether a carry has occurred at one of the two half adders

Question 23

Ripple-Carry Adder based on half adder and full adder

Answer 23

 By cascading full adders with a half adder, an adder for the addition of two n-bit long numbers can be realized
 Least significant bits are adjacent to the half adder (right); Most significant bits are adjacent to full adder (left)
 Transfers from the previous adder stage are passed to and processed by the next higher adder stage

Question 24

Disadvantage of Ripple-Carry Adder

Answer 24

Transfers at the least significant bit must be looped forward trhough the complete cascade to the most significant bit -> Adder does not work deterministically (time needed to calculate the result cannot be predicted due to switching times of the individual gates; it depends on the operands to be added)

Question 25

Serial-Adder based on one full adder

Answer 25

A serial-adder constits of three n-bit shift registers, a full adder and a 1-bit memory, which is realized as a positive edge-triggered D-flip-flop

• A shift register is an n-bit memory whose content can be shiftet bit by bit either to the left or to the right
• Two shift registers are used to load the two binary numbers as operand registers and in one shift register the result of the addition is stored

Question 26

Deterministic Approach to add binary numbers (Serial-Adder)

Answer 26

Operands are loaded into operand registers, with every clock cycle, addition of two bits is executed, result is shifted into result register, operand registers are shifted one bit to the right, carry over is termporarily stored in 1 bit memory.

Question 27

Negative Numbers - Signed Numbers

Answer 27

The most significant bit indicates the sign of the binary number.
o Positive numbers are represented linearly
o Signed representation of binary numbers jumps from the right side of the number beam to the left side as soon as the most significant bit changes from 0 to 1

Convert positive numbers into negative numbers (Two’s Complement):
 Binary representation of the number is negated bit by bit
 Add “1” to the number

o Subtraction of binary numbers can be replaced by bitwise negation (for further information see lecture slide 35)

Question 28

Embedded Systems

Answer 28

Embedded Systems are computer systems which are integrated into an embedding system, here a production system

• Design requirements are derived from the embedding system
• ES measures, stores, processes and monitors data and controls the embedding system
• Examples for ES: Programmable Logic Controllers (PLC) or Industrial PCs (IPCs)

Question 29

Components of Embedded Systems

Answer 29

• Microprocessor/Microcontroller for instruction execution
• RAM (Random Access Memory) as temporary storage for calculations
• ROM (Read-Only Memory) as long-term, fast-reading, non-volatile memory for storing configurations of other data (Non-volatile means that data continues to be retained in a de-energized state)
• D/A converter for converting analog voltages into digital numerical values
• (Mostly standardized) interfaces to other systems, e.g. HDMI/DVI for displays, USB for connection to PCs, field busses (like ProfiBus), Ethernet, CAN bus etc.
• Accelerated hardware used specifically for data-intensive application functions, such as signal processing or encoding of data streams
• Bus Systems are used to interconnect chips

Question 30

Static vs. Dynamic RAM

Answer 30

 Static RAM: Data can be stored for any length of time, when operating voltage is applied

 Dynamic RAM: Requires periodic refreshing to prevent data loss

Question 31

Different Embedded Systems Structures

Answer 31

• Board System
• Multi Chip Module (MCM)
• System on a Chip (SoC)

Question 32

ES: Board System

Answer 32

 Central components are distributed over several chips and accommodated on one or more circuit boards  Board size depends on number of chips used
 Decreasing in use today because of large required space and development for one specific task
 Example: Rasberry Pi

Question 33

ES: Multi Chip Module (MCM)

Answer 33

 Several microchips are accommodated in a common housing
 Typical chips to be integrated are microcontrollers, peripheral chips, RAM and ROM
 Do not differ externally from SoCs
 Specialized chips

Question 34

ES: System on a Chip (SoC)

Answer 34

 Many components of an ES are integrated on one chip  Require hardly any external circuitry
 An SoC consists of microcontroller, RAM, mostly ROM and peripherals
 Not developed specifically for one task  Can cover almost all possible tasks

Question 35

Programmable Logic
(Advantage, Fields of Application)

Answer 35

o Interconnection of the logic circuits can be programmed (as oppose to hard-wired hardware) -> Variable complexity

o Needed when standard processors are not fast enough, cost too much, or require too much power

o Often used for prototyping in order to perform further optimizations and corrections

o Wide range of applications -> Competes with application-specific integrated circuits (ASICs)

Question 36

Programmable Array Logic (PAL)

Answer 36

 Gird of programmable grid points -> Each grid point is programmed to one of four basic building blocks (can be written once)

 Consist of hardwired and programmable gates -> AND gates are freely programmable; OR gates are hardwired

 Programming is done by deliberate destruction of connections to AND gates by overvoltage -> Programming is possible once

Question 37

Programmable Logic Array (PLA)

Answer 37

Programmable logic that can be rewritten -> Programming is done by selective writing of single grid points (each grid point corresponds to one of four basic blocks)

 Number of columns corresponds to the number of terms in all switching functions to be realized
 Number of rows corresponds to the number of different variables in all switching functions and the number of switching functions to be realized
 Binary value 0 is applied to left of output lines
 Binary value 1 is applied to top of all columns

Question 38

Complex Programmable Logic Device (CPLD)

Answer 38

 Consists of Logical Array Blocks (LABs) interconnected with Programmable Interconnect Arrays (PIAs)
-> Individual LABs linked together as needed to route signals through signal switches

 Additionally, there are input and output blocks which can also store data
 CPLDs are rewritable
 Configuration or programming is nonvolatile

Question 39

Field Programmable Gate Array (FPGA)

Answer 39

 Many CLBs (Configurable Logic Blocks) form a complex overall function by programmable connections
 CLBs consist of a lookup table and a flip-flop

Question 40

Pipelining: Fetch

Answer 40

Instruction is loaded from memory or from the cache

Question 41

Pipelining: Decode

Answer 41

• Stage 1: Determining the instruction type and deciding whether the loaded instruction can be processed in one or two steps
• Stage 2: Determination of the addresses of the operands to be processed

Question 42

Pipelining: Execute

Answer 42

Operands are loaded from the cache and the arithmetic operations are performed

Question 43

Pipelining: Write Back

Answer 43

Processing results are written into the cache or the main memory