x86 Assembly Language - Part 1 Flashcards
Name the 3 aspects of computer design
Instruction Set Architecture (ISA), Computer Organization, and Computer Hardware
Define Instruction Set Architecture (ISA)
ISA refers to the actual machine interface visible to a programmer, such as the instruction set, registers, memory organization, and exception (interrupt) handling.
2 types of Instruction Set Architecture
Reduced Instruction Set Computer (RISC) architecture and Complex Instruction Set Computer (CISC) architecture and
Features of RISC ISA
- Fixed length encoding (ALL instructions are the SAME length)
- Addressing modes are typically bases and displacements.
- Arithmetic & logical operations (ALU) can be performed on registers.
- The only instructions that can affect memory are load and store instructions.
- No condition registers
- RISC processors use less power and generate less energy (heat).
- Large number of registers (32, 64, or 128 usually)
- Register-intensive procedural linkage: registers used for procedure arguments, return values, and addresses.
- All processors in smartphones and tablets are of RISC architecture.
Define load instruction
Move data from memory to a register
Define store instruction
Move data from a register to memory
Define load-store architecture
Move data from memory to a register (load) or to memory from a register (store).
Features of CISC ISA
- Variable length encoding (instruction length varies)
- More addressing modes, such as base, displacement, index, registers, sclae factors, etc.
- Arithmetic & logical operations (ALU) can be performed on registers OR directly on memory.
- Condition codes hold the side effects of instructions.
- CISC processors use more power and generate more energy (heat).
- Large number of registers (32, 64, or 128 usually)
- Stack-intensive procedural linkage: stacks used for procedural arguments, return values, and addresses.
- Intel IA-32 processors and other 64-bit versions of the ISA are of CISC architecture; found in over 90% of desktops and laptops computers.
What are the 64-bit (8-byte) integer registers in x86-64?
%rax, %rbx, %rcx, %rdx, %rsi, %rdi, %rbp, %rsp, %rN, where 8 <= N <= 15
What are the 32-bit (4-byte) integer registers in x86-64?
%eax, %ebx, %ecx, %edx, %esi, %edi, %ebp, %esp, %rNd, where 8 <= N <= 15
What are the 16-bit (2-byte) integer registers in x86-64?
%ax, %bx, %cx, %dx, %si, %di, %bp, %sp, %rNw, where 8 <= N <= 15
What are the 8-bit (1-byte) integer registers in x86-64?
%al, %bl, %cl, %dl, %sil, %dil, %bpl, %spl, %rNb, where 8 <= N <= 15
What are the general-purpose 64/32/16/8-bit registers? What are they used for?
%rax/eax/ax/al, %rbx/ebx/bx/bl, %rcx/ecx/cx/cl, %rdx/edx/dx/dl, %rsi/esi/si/sil, %rdi/edi/di/dil, %rN/rNd/rNw/rNb, where 8 <= N <= 15. General-purpose registers are used to store integer data types and addresses.
What are the stack management registers?
They are rsp and rbp - %rsp is the address of the top of the stack; it points to the last value pushed onto the stack. %rbp is a frame pointer; it points to the bottom of the stack frame of the function currently being executed.
Define the mov instruction
The mov instruction copies N number of bytes from a source operand to a destination operand, where the size of the source and destination determines N.