week 6 Instruction Set Architecture (ISA)

Question 1

address space

Answer 1

number of drawers

Question 2

addressability

Answer 2

number of bits per drawer

Question 3

data memory

Answer 3

memory where we store data NOT INSTRUCTION

Question 4

Program memory

Answer 4

where we store our instructions

Question 5

decoder

Answer 5

takes instruction apart and determines necessary control signals.

Question 6

Instruction Set Architecture (ISA)

Answer 6

Programmer visible components and operations.

Everything needed to create a program for CPU

contract between programmer and CPU designer

Different implementations of the same ISA are binary compatible

Question 7

Opcode

Answer 7

the portion of a machine language instruction that specifies the operation to be performed like arithmetic, logic, etc.

Question 8

Processor Status Word Register (PSR)

Answer 8

16 bit register where the lower 3 bits store the NZP bits. The PST[15] stores the privilege level that the CPU is currently operating in.

Question 9

Sign extension

Answer 9

the operation in computer arithmetic of increasing the number of bits of a binary number while preserving the number’s positive and negative sign and value.