Week 1

Question 1

ALU

Answer 1

-Arithmetic and Logic Unit inside of CPU
LC-3: Can perform “ADD”, “AND”, and “NOT operations

Question 2

Memory

Answer 2

-Stores bits in a 2^k x m array
-k = # of bits in address (index)
-m = # of bits that can be stored
-Contains MAR and MDR
-Has load and store operations
LC-3: k = 16 and m = 16

Question 3

Load

Answer 3

-Gets data out of memory (“Read”)
Steps:
1: Write address to MAR
2: Send a “read” signal
3: Read value from MDR

Question 4

Store

Answer 4

-Puts data into memory (“write”)
Steps:
1: Write value to MDR
2: Write address to MAR
3: Send a “write” signal

Question 5

MAR

Answer 5

-Memory Address Register
-Contains the address/index of a piece of data stored on memory

Question 6

MDR

Answer 6

-Memory Data Register
-Stores the data to be put in or taken out of the memory

Question 7

CPU - Registers

Answer 7

-Small bits of temporary data in the cpu

Question 8

Word Size

Answer 8

-Number of buts handled at once by the Processing Unit (size of the registers)
LC-3: Has eight registers (each holding 16 bits = word size)

Question 9

Control Unit

Answer 9

-Interprets instructions and sends signals to other components for coordination of instructions
-Contains the IR and the PC

Question 10

IR

Answer 10

-Instruction Register
-Contains the current instruction being executed

Question 11

PC

Answer 11

-Program Counter
-Contains the memory address of the next instruction to be executed

Question 12

I/O Devices

Answer 12

-Devices used for transferring data into and out of the memory
-Keyboards, speakers, displays, etc
-Program that controls devices = drivers
LC-3: Uses keyboard for input and terminal for output

Question 13

ISA

Answer 13

-Instruction Set Architecture
-Provides all info needed to write a program in machine language
-Microarchitecture = hardware of ISA

Question 14

Opcode

Answer 14

-Specifies which operation to perform

Question 15

Operand

Answer 15

-Data used for the operation

Question 16

Instruction Cycle

Answer 16

-Sequential stages in which machine executes a single instruction
-Fetch, Decode, Evaluate Address, Fetch Operands, Execute, Store

Question 17

Fetch

Answer 17

-Loads instruction into memory
Steps:
1. Copies contents of PC into MAR
2. Send a “read” signal to memory
3. Copy contents of the MDR into the IR
4. Increment PC (PC = PC + 1)

Question 18

Decode

Answer 18

Determines how to execute the instruction
Steps:
1. Identify the opcode/function
2. Assert control line based on 4-to-16 decoder
3. Identify the operands based on opcode

Question 19

Evaluate Address

Answer 19

-Computes address used to access memory
Not used for some instructions (like add)

Question 20

Fetch Operands

Answer 20

-Loads instruction’s operands
-Can load values from memory or registers

Question 21

Execute

Answer 21

-Performs operations that require ALU
-Send signal to ALU
-Not always used

Question 22

Store

Answer 22

-Writes result of the instruction to destination
-Can store in memory or in registers

Question 23

Pipelining

Answer 23

-Overlaps instructions, executing multiple instructions at different stages at the same time
LC-3: NOT used