Virtualization and Cloud Flashcards
Hypervisor should have full control of virtualized resources
Safety in VM
Behavior of a program should be the same as running program on baremetal
Fidelity in VM
Much of the code in VM should run without intervention
Efficiency in VM
Can directly access resources of underlying machine and implement resource allocation strategies to service VMs
Type 1 hypervisor
Must negotiate resources with base operating system
Type 2 hypervisor
Only uses hypercalls to get system services like I/O
microkernel
Modify sourcecode of guest operating system
paravirtualization
Executes hypercalls, defined in API and exposed to guest OS
paravirtualization
When sensitive instruction occurs, trap in host OS and delegate to hypervisor
true virtualization
Generic set of procedures that can be executed by any hypervisor
Virtual machine interface
- On demand service
- Broad network access
- Resource pooling
- Rapid elasticity
- Measured service
Requirements of cloud platform
any x86 OS any app can run without modification
Challenges in virtualization of x86 - compatability
performs all UI functions, starts VM and performs most drive emulation, as well as proxying calls to base OS
VMX
Small kernel-mode driver that is installed alongside host OS to allow VMM to run by briefly suspending OS
VMX driver
Holds all software to multiplex CPU and memory, including exception handlers, trap and emulate handlers, etc
Virtual memory manager
Context of VMM changes from host OS to VMM
World switch
Swaps all memory and registers, including exception handlers and privileged requests
world switch
VMWare’s type 1 hypervisor
ESX server
Baremetal hypervisor with VMM that allows for multiple virtual machines
ESX server
- CPU scheduler ensures each virtual machine gets a fair share of CPU
- Memory manager optimized for scalability, even when VM requests more memory than available
- File system optimized for VM images and high I/O throughput
- Easy to extend capabilities and enable plugins
ESX server benefits
Each word in memory can be read as fast as any other word
Uniform memory access
Multiprocessor with single bus, used by all cores
UMA with bus-based architecture
Leads to issues when one CPU core is using bus more than others
Issues with UMA and bus-based architecture
Block can either be read-only, allowing it to be in multiple cache lines at same time, or read-write, where it can be in only one cache at a time
UMA with bus-based architecture
At each intersection of horizontal and vertical lines is a crosspoint, either in an open or closed state
UMA with crossbar switches
Crossbar switches are ______, so CPU is never denied connection
UMA with crossbar switches
Based on 2x2 switch, message arriving on any input can be swapped to any output
UMA with multistage switching
Still vulnerable to blocking if data is being read / written using same bus at same time
UMA with multistage switching
Access to local slice of memory is faster than accessing remote memory
NUMA multiprocessor
- Single address space visible to all CPUs
- Access to remote memory via LOAD and STORE instructions
- Access to remote memory is slower than access to local memory
Characteristics of NUMA
- Each CPU has own private OS
- Multiprocess memory partitioned amongst CPUs, but share underlying OS
- Process makes syscall that is handled by own CPU. No processes shared.
- No sharing of physical pages
- Inconsistency can result if two CPUs attempt to modify same data
Each CPU has own OS
- One copy of each operating system on master
- All syscalls are directed to master
- When CPU goes idle, prompt master for next process
- One buffer cache, master delegates pages
Master-slave multiprocessing
- One copy of OS in memory, but any system can access
- When syscall made, CPU executing process will trap to kernel and process syscall
- Multiple mutexes in kernel, divided into submodules to ensure CPUs cannot access same resource at same time
Symmetric multiprocessing
Using TSL for multiprocessing will lead to
spin lock
CPU is blocked from accessing bus will constantly request lock
spin lock
Give CPU each own private lock variable in unusued cache block. Check cache for any other CPU requesting resource and give access to that CPU
TSL cache thrashing
Partition CPU into blocks. Only execute threads once there are enough free CPUs in partition
Space sharing
Groups of threads scheduled as a unit. All members run at once on different timeshared CPUs. All members start and end time slices together
Gang scheduling
Limited from doing anything on CPU until send/receive is finishd
Blocking calls
Transfer control to kernel temporarily, then return before actual call is finished
Nonblocking calls
Each machine has own VM and page table. When need page that CPU does not have, OS traps and asks CPU to hold page to unpage and send to requesting CPU
Distributed shared memory
In multi-computer approach, when a CPU only needs part of page and constantly has to unpage and page with CPU that needs other part of page
false sharing
