Unit 1 - Components of a CPU Flashcards
Arithmetic and Logic Unit (ALU)
This performs any arithmetic calculations (e.g. adding binary) or any logic comparisons (using AND, OR, NOT)
The ALU is made up of several components
Control Unit
This is where instructions are decoded. The CU also controls the data within the CPU and how it moves around
Program Counter (PC)
This stores the address in memory of the next instruction to be fetched
Accumulator (ACC)
This is where values are stored temporarily, either after they’ve been inputted or loaded, or after being calculated in the ALU
Memory Address Register (MAR)
This is where addresses are stored, either for where data is being sent in memory, or where it is being fetched from
Memory Data Register (MDR)
This is where data/instructions are stored, either before it sent to memory, or after being fetched
Current Instruction Register (CIR)
When an instruction has been fetched from memory it is loaded here before being split into opcode and operand. After this, it will be decoded.
What components does the ALU consist of?
Arithmetic circuit, Logic circuit, Registers, Status flags, Buses
Purpose of Arithmetic Circuit
This carries out any arithmetic (addition, subtraction, multiplication or division)
Purpose of Logic circuit
This carries out operations like AND, OR, NOT, XOR
Purpose of Registers
These are additional registers to those mentioned above and can store data
Purpose of Status flags
This includes overflow flags (if the value is too large for the register) or could include a zero flag (to tell if the answer is 0 easily)
Purpose of Buses
These are used to transport data around the ALU and to other parts of the CPU
Buses within the CPU
Data bus, Address bus, Control bus
Data Bus
Holds data being sent to/from the CPU and RAM (Read/ Write)
Address Bus
Holds addresses being sent to/from the CPU and RAM (Read/ Write)
Control Bus
Sends Signals to determine whether the other buses are in read or write mode (Sends signals)
3 Stages of the FDE
Fetch, Decode, Execute
Fetch
Fetching an instruction from memory - supplying the address and receiving the instruction from memory
Decode
Decoding the instruction - interpreting the instruction and then reading and retrieving the required data from their addresses
Execute
Executing the instruction - the CPU carries out the required action
Steps of Fetch
The PC is loaded with 0
The value from the PC (0) is copied to the MAR
The data from the MAR (0) is sent across the address bus with the instruction to read the data sent across the control bus
The data from that location in memory (0) is sent down the data bus to the MDR
The PC is incremented by 1
Steps of Decode
The data is sent from the MDR to the CIR where it is split into the opcode and operand
This is sent to the CU to be decoded
Steps of Execute
Which registers are used here will depend on the instruction being executed
If a value is being inputted the ACC will store the value
If a value is being outputted this will be the value currently in the ACC
If a value is loaded from RAM this will be sent across the data bus from RAM (in the address location in the MAR) to the MDR
If a value is to be stored it will take the value from the ACC, send it to the MDR and then send it across the data bus to RAM (to the address location in the MAR)
If a value is being added to or subtracted from another value
If the LMC code is to branch the comparison will take place in the ALU
Factors affecting CPU performance
Clock Speed, Number of cores, Cache
