Unit 1 - Components of a CPU

Question 1

Arithmetic and Logic Unit (ALU)

Answer 1

This performs any arithmetic calculations (e.g. adding binary) or any logic comparisons (using AND, OR, NOT)

The ALU is made up of several components

Question 2

Control Unit

Answer 2

This is where instructions are decoded. The CU also controls the data within the CPU and how it moves around

Question 3

Program Counter (PC)

Answer 3

This stores the address in memory of the next instruction to be fetched

Question 4

Accumulator (ACC)

Answer 4

This is where values are stored temporarily, either after they’ve been inputted or loaded, or after being calculated in the ALU

Question 5

Memory Address Register (MAR)

Answer 5

This is where addresses are stored, either for where data is being sent in memory, or where it is being fetched from

Question 6

Memory Data Register (MDR)

Answer 6

This is where data/instructions are stored, either before it sent to memory, or after being fetched

Question 7

Current Instruction Register (CIR)

Answer 7

When an instruction has been fetched from memory it is loaded here before being split into opcode and operand. After this, it will be decoded.

Question 8

What components does the ALU consist of?

Answer 8

Arithmetic circuit, Logic circuit, Registers, Status flags, Buses

Question 9

Purpose of Arithmetic Circuit

Answer 9

This carries out any arithmetic (addition, subtraction, multiplication or division)

Question 10

Purpose of Logic circuit

Answer 10

This carries out operations like AND, OR, NOT, XOR

Question 11

Purpose of Registers

Answer 11

These are additional registers to those mentioned above and can store data

Question 12

Purpose of Status flags

Answer 12

This includes overflow flags (if the value is too large for the register) or could include a zero flag (to tell if the answer is 0 easily)

Question 13

Purpose of Buses

Answer 13

These are used to transport data around the ALU and to other parts of the CPU

Question 14

Buses within the CPU

Answer 14

Data bus, Address bus, Control bus

Question 15

Data Bus

Answer 15

Holds data being sent to/from the CPU and RAM (Read/ Write)

Question 16

Address Bus

Answer 16

Holds addresses being sent to/from the CPU and RAM (Read/ Write)

Question 17

Control Bus

Answer 17

Sends Signals to determine whether the other buses are in read or write mode (Sends signals)

Question 18

3 Stages of the FDE

Answer 18

Fetch, Decode, Execute

Question 19

Fetch

Answer 19

Fetching an instruction from memory - supplying the address and receiving the instruction from memory

Question 20

Decode

Answer 20

Decoding the instruction - interpreting the instruction and then reading and retrieving the required data from their addresses

Question 21

Execute

Answer 21

Executing the instruction - the CPU carries out the required action

Question 22

Steps of Fetch

Answer 22

The PC is loaded with 0

The value from the PC (0) is copied to the MAR

The data from the MAR (0) is sent across the address bus with the instruction to read the data sent across the control bus

The data from that location in memory (0) is sent down the data bus to the MDR

The PC is incremented by 1

Question 23

Steps of Decode

Answer 23

The data is sent from the MDR to the CIR where it is split into the opcode and operand

This is sent to the CU to be decoded

Question 24

Steps of Execute

Answer 24

Which registers are used here will depend on the instruction being executed

If a value is being inputted the ACC will store the value

If a value is being outputted this will be the value currently in the ACC

If a value is loaded from RAM this will be sent across the data bus from RAM (in the address location in the MAR) to the MDR

If a value is to be stored it will take the value from the ACC, send it to the MDR and then send it across the data bus to RAM (to the address location in the MAR)

If a value is being added to or subtracted from another value

If the LMC code is to branch the comparison will take place in the ALU

Question 25

Factors affecting CPU performance

Answer 25

Clock Speed, Number of cores, Cache