Transistors, Logic Gates, and Combinational Logic

Question 1

Transistor

Answer 1

electrical device that acts as an electrical switch; typically made from silicon

Question 2

MOSFET

Answer 2

(metaloxide semiconductor fieldeffect transistor): a specialized fieldeffect transistor or FET; like all transistors, used for switching or amplifying signals

Question 3

nMOSFET (nMOS)

Answer 3

channel carries negative charges (electrons)

Question 4

pMOSFET (pMOS)

Answer 4

channel carries positive charges (holes)

Question 5

CMOS

Answer 5

pairing nMOS and pMOS transistors together

Question 6

Inverter

Answer 6

logic gate that implements logical negation

Question 7

NAND

Answer 7

logic gate producing an output that is false only if all its inputs are true;
parallel structure on top and series on the bottom

Question 8

NOR

Answer 8

result of the negation of the OR operator; can also be seen as an AND
gate with all the inputs inverted; parallel structure on the bottom and series on top

Question 9

Gate delays

Answer 9

longest path (in gates) through a circuit

Question 10

PLA

Answer 10

( programmable logic array): a kind of programmable logic device used to
implement combinational logic circuits
○ A tool to go from truth table to logic gates
○ Not the most efficient tool but it always works!

Question 11

Half adder

Answer 11

logic circuit implementing binary addition

Question 12

Combinational logic

Answer 12

using several logic gates together to create a logic circuit

that performs work for us like adders, multipliers, etc.

Question 13

Multiplexer (MUX)

Answer 13

device that combines several analogs or digital input signals
and forwards them into a single output line

Question 14

Transistor: electronic switch

Answer 14

Two complementary flavors: nMOSFET and pMOSFET (CMOS)

○ Controls the flow of current in a circuit

Question 15

General structure for CMOS

Answer 15

All CMOS gates must have 2 parts:
■ PUN (pullup
network): pulls output “up” to PWR (logic 1)
● Rule: PUN can only contain PMOS transistors
■ PDN (pulldown
network): pulls output “down” to GND (logic 0)
● RULE: PDN can only contain NMOS transistors
○ Either PUN or PDN is “ON” at any given time (never both)
○ Output is taken where PUN and PDN intersect

Question 16

How a transistor works

Answer 16

Off: electrons cannot move between the source and drain, no path exists
under the gate. The transistor aka “the switch” is “OFF.”
○ On (how it works in nMOS transistor):
■ Positive charge repels holes from under the gate
■ Attracts electrons from source/drain regions
■ Creates an “ntype”
channel under the oxide
● Why it’s called an “nMOS” transistor
■ Current can flow from drain to source; electrons enter source and
exit drain
■ Electrons cannot penetrate oxide
● Electric field forms across oxide, why it’s called “FET”

Question 17

Logic minimization using Laws of Boolean Algebra

○ Identities

Answer 17

■ X AND 1 = X; X AND 0 = 0

■ X OR 1 = 1; X OR 0 = X

Question 18

Logic minimization using Laws of Boolean Algebra

Associative laws

Answer 18

■ A AND (B AND C) = (A AND B) AND C

■ A OR (B OR C) = (A OR B) OR C

Question 19

Logic minimization using Laws of Boolean Algebra

Distributive laws

Answer 19

■ A AND (B OR C) = (A AND B) OR (A AND C)

■ A OR (B AND C) = (A OR B) AND (A OR C)

Question 20

Logic minimization using Laws of Boolean Algebra

De Morgan’s laws

Answer 20

■ A NAND B = NOT (A AND B) = (NOT A) OR (NOT B)

■ A NOR B = NOT (A OR B) = (NOT A) AND (NOT B)

Question 21

Binary number calculators

Answer 21

Nbit
incrementer: N 1bit
half adders combined
○ Subtractor: negate combined with Nbit
incrementer
○ Selector (MUX):
■ N select bits choose from 2 N inputs
■ adder/subtractor
○ Multiplier: combinational multiplier using adders and MUXs