Topic 1.1 Flashcards
The characteristics of contemporary processors, input, output and storage devices
Examples of arithmetic operations
Add
Subtract
Multiply
Divide
Examples of control signals
Bus request
Bus grant
Memory write
Memory read
Interrupt request
Clock
Examples of logic operations
AND
OR
NOT
XOR
Function of the accumulator
Stores the results from calculations
Function of the CIR
Holds the current instruction being executed, divided up into operand and opcode
Function of the MAR
Holds the address of a location that is to be read from or written to
Function of the MDR
Temporarily stores the data that has been read or data that needs to be written
Function of the PC
Holds the address of the next instruction to be executed
How does pipelining work
The process is split into instruction pipelining and arithmetic pipelining, and they carry out the appropriate tasks
How is assembly language executed
The instruction is divided into operand and opcode in the CIR
The operand contains the data/address upon which the operation is to be performed
The opcode specifies the type of instruction to be executed
Jobs the control unit has ( maybe remember just a few)
Controlling and coordinating activities of the CPU
Managing the flow of data between the CPU and other devices
Accepting the next instruction
Decoding instructions
Storing the resulting data back in memory
What are buses
A set of parallel wires that connect 2 or more components
What are registers
Small memory cells within the CPU, which
operate at a very high speed and are used to temporarily store data
What are the 3 types of buses
Data bus
Address bus
Control bus
What are the main 3 factors affecting CPU performance
Clock speed
Number of cores
Cache memory
What does the control bus do
Coordinates the use of the address buses and data buses and provides status information between system components
What happens in the fetch phase of an FDE cycle
The address from the PC is copied to the MAR
The instruction held at the address is copied to the MDR by the data bus
Simultaneously, the contents of the PC are increased by 1
The value held in the MDR is copied to the CIR
What is a bus grant
Shows that the CPU has granted access to the data bus
What is a bus request
Shows that a device is requesting the use of the data bus
What is a clock
Used to synchronise operations
What is a control bus
A bi-directional bus used to transmit control signals between internal and external components
What is a core
An independent processer that is able to run its own FDE cycle
What is a interrupt request
Shows that a device is requesting access to the CPU
What is a system clock
An electronic device that determines clock speed and generates signals
What is arithmetic pipelining
Breaking down the arithmetic operations and overlapping them as they are performed
What is assembly language
A code that uses mnemonics to represent instructions
Eg. ADD represents addition
What is clock speed
The time taken for one clock cycle to complete
What is instruction pipelining
Seperating out the instruction into fetching, decoding, and executing
What is meant by the width of the bus
The number of parallel wires the bus has
Bus width is directly proportional to the number of bits transferred
Eg. 8 , 16 , 32 or 64 wires wide
What is memory read
Data is read from a specific location to be placed onto the data bus
What is memory write
Data is written into the addressed location using this bus
What is pipelining
The process of completing fetch-decode-execute cycles of 3 separate instructions simultaneously
What is the address bus
The bus used to transmit memory addresses
(Specifies where data is to be sent or retrieved from)
The width of the address bus is proportional to the number of addressable memory locations
What is the ALU
Arithmetic logic unit
Completes arithmetic and logical operations
What is the control unit
The component of the CPU that directs its operations
What is the CPU
The brain of the computer
It executes instructions that allow programs to be run
What is the data bus
A bi-directional bus
This means bits can be carried in both directions
Used to transport data and instructions between components
What is the FDE cycle
A sequence of operations that are completed in order to execute an instruction
What occurs in the decode phase of an FDE cycle
The contents of CIR are split into operand and opcode
What occurs in the execute phase of an FDE cycle
The decoded instruction is executed
Where is data held for pipelining
In a buffer in close proximity to the CPU
Why are dual codes not useful
Not all programs are able to utilise multiple cores efficiently as they have not been designed to do so
Why are dual cores useful
Theoretically, they can complete tasks twice as fast as a single core.
Why is pipelining used on 3 separate instructions
While one instruction is being executed, another can be decoded, and another can be fetched
What is cache menory
The CPUs on board memory
Instructions are fetched from main memory and are copied to the cache so that they can be accessed quicker
As the cache fills up , unused Instructions are replaced
Properties of level 1 cache
Very fast memory cells
(2 - 64 KB)
Properties of level 2 cache
Relatively fast memory cells
(256 KB - 2MB)
Properties of level 3 cache
Much larger and slower memory cells
What is von neuman architecture
This architecture includes the basic components of the computer and processor (ALU , registers , memory units , control unit)
In which a shared memory and shared data bus is used for both data and instructions
What is Havard architecture
This architecture has physically separate memories for instructions and data
(This architecture is more commonly used for embedded processors)
Examples of havard architecture in use
This architecture is useful for when memories have different characteristics
Instructions may be read only while data may be read and write
List some advantages of using von neuman architecture
It is cheaper to develop as the control unit is easier to design
Programs can be optimised in size
List some advantages of havard architecture
Quicker execution as data and instructions can be fetched in parallel
Memories can be different sizes, which can make more efficient use of space
What is contemporary processing
Processors which use a combination of hazard and von neuman architecture.
Von neuman is used for working with data and instructions in main memory
Havard is used to divide the cache into instruction cache and data cache
