topic 1

Question 1

what is a CPU?

Answer 1

Our CPU (or silicon chip or simply processor) is actually an integrated circuit (IC), which consists of millions of transistors interconnected by microscopic wires on a footprint of around 1cm^2 (transistors are the building blocks of electronic circuits)

Question 1

how is an intergrated circuit produced?

Answer 1

the designed IC will be etched onto a wafer of silicone. in order to counter errors in the production process, 100s of copies of the same IC are etched with each one called a die. The dies are tests and each error free die is cut and mounted in a package with the dies pads connected to package pins. this results in the silicone chip being encased in a package with the external contacts of the IC connected to the pins in the package to enable direct contact with other components within the PC

Question 2

what is the multicore processors?

Answer 2

multiple independent cores (CPUs) are manufactured on the same IC but these cores share things like main memory, due to technological limitations only a few are used today. Future technological advances will lead to multi-core processors with hundreds of cores becoming many-core processors. In order to utilize this programmer must think parallel rather than sequentially

Question 3

what does moores law state?

Answer 3

Moore’s law states that the transistor capacity of an IC doubles every 18-24 months. - rough description of a long-term trend,

Question 4

what are the flaws of mooores law?

Answer 4

there is a fundamental limit on the number of transistors as when it reaches the atomic scale they wont be able to decrease further. Power dissipation is an issue due to the fact power is proportional to the number of transistors switched multiplied by the frequency of the switching ie the clock speed of the CPU. Therefore, as the number of transistors increase so does the power usage therefore power dissipation.

Question 5

why might multiple core processors solve the issue of power dissipitation?

Answer 5

Power dissipation is an issue due to the fact power is proportional to the number of transistors switched multiplied by the frequency of the switching ie the clock speed of the CPU. Therefore, as the number of transistors increase so does the power usage therefore power dissipation. multi-core processors solve this as instead of using one high clock speed CPU they can use multiple lower clock speeds which work together and give better computational power

Question 6

what are the three fundamental logic gates?

Answer 6

NOT, OR, AND

Question 7

what is a logic gate?

Answer 7

small circuits made up of transistors – can be used to store Boolean values such as 1 or 0 interpreted by a low or high voltage therefore creating a Boolean output

Question 8

how many transistors does it take to build an NOT gate?

Answer 8

2 transistors

Question 9

how many transistors does it take to build an AND gate?

Answer 9

6 transistors

Question 10

how many transistors does it take to build an OR gate?

Answer 10

6 transitors

Question 11

how many transistors does it take to build a NAND gate?

Answer 11

2 transistors

Question 12

why might the NAND gate be considered the fundamental logic gate?

Answer 12

this is due to the fact that a NAND gate can be used to create all the other logic gates .

Question 13

how can a NAND gate create a NOT gate?

Answer 13

the NAND gate can create a NOT gate by duplicating the inputs

Question 14

how can a NAND gate create an OR gate?

Answer 14

A NAND gate can form an OR gate by a NAND gate where the two inputs are prefixed by a NOT gate.

Question 15

how can a NAND gate create an AND gate?

Answer 15

A NAND gate can form an AND gate by having a NAND gate followed by a NOT gate

Question 16

is it true that for any given function we can compute the function using just NOT AND and OR gates?

Answer 16

yes

Question 17

what is binary system?

Answer 17

binary uses power of 2 to signal its numbers with 2^0 at the furthest to the right and in increasing maginitude the further left. for example 001 is equal to 1 and 101 is equal to 5 as 2^2 +2^0

Question 18

what is the purpose of a half adder?

Answer 18

the half adder takes inputs X and Y and calculates the boolean sum of the two values. The Boolean sum of a collection of inputs is 1 if, and only if, an odd number of the inputs are 1, and also the resulting carry bit c(x, y), which is 1 if, and only if, both x and y are 1

Question 19

what is the purpose of a full adder?

Answer 19

a full adder takes the inputs X Y and C and computes the boolean sum together with a carry bit D which is 1 only of atleast two of the inputs are 1

Question 20

what is a full adder made of?

Answer 20

two half adders and an OR gate

Question 21

what is the arithemtic logic unit?

Answer 21

it is a part of the CPU which performs all the arithmetic and logical operations on data.

Question 22

what is the datapath?

Answer 22

The datapath performs all the data processing operations (it is the ‘brawn’ of the processor) and includes the arithmetic logic unit. The datapath includes (a limited number of) memory locations called registers

Question 23

what is the control?

Answer 23

The control tells the datapath, memory and input/output (I/O) de-vices what to do (it is the ‘brains’ of the processor). Essentially, the control is the conduit( the way of passing information) between the datapath and the main memory.

Question 24

what is the cache?

Answer 24

A cache consists of small, fast and relatively expensive on-chip memory. Data caches are used to store memory items that need to be regularly accessed (sometimes there is more than one such cache). Similarly, instruction caches are used to store instructions that need to be regularly executed (we’ll say more about caches later)

Question 25

what is the key aspect of von neumann architecture?

Answer 25

A key aspect of the von Neumann architecture is that the stored program and the data are both held in memory, which allows for self-modifying programs

Question 26

what is a flaw with von neumann architecture?

Answer 26

programming errors might result in a program obliterating itself or modifying itself in unintended ways!

Question 27

what are the three types of buses?

Answer 27

data bus, address bus, control bus

Question 28

what is a bus in computer science terms?

Answer 28

a bus is simply a communications device that can be thought of as a series of ‘parallel wires’ down which data can flow, with the number of these ‘wires’ being the width of the bus

Question 29

what is a von neumann bottleneck?

Answer 29

a limitation in the data transfer rate between the CPU and memory (as stated above, data and instructions have to be fetched in sequential order and the CPU spends a considerable time idle whilst waiting for data items or instructions to be fetched from memory).

Question 30

what did the von neumann bottleneck give rise to?

Answer 30

it gave rise to the use of caches

Question 31

what is the harvard architecture?

Answer 31

The Harvard architecture, where memory is partitioned into data memory and instruction memory with dedicated buses for each of them, does not suffer from the von Neumann bottleneck Now, as the program instructions and data items can be fetched simultaneously

Question 32

what is a modified harvard architecture?

Answer 32

data memory and instruction memory are separated, each with their own dedicated bus, the processor allows data to be treated as instructions and instructions to be treated as data; this allows for self-modifying or self-optimising code. In addition, there are separate CPU caches for instructions and for data

Question 33

what is memory?

Answer 33

memory is a set of pigeon holes into which data can be placed. each pigeon hole has a unique address and holds 1 byte of storage( 8 bits either 1 or 0)

Question 34

what is the role of the address bus?

Answer 34

The address bus holds addresses of locations in main memory. The width of the address bus determines the size of addressable memory. For example, an address bus that is 32 bits wide can carry at most 2^32 different addresses. So, as each memory address holds 1 byte then addressable memory has size 4 Gbytes.

Question 35

what is the role of the data bus?

Answer 35

The data bus carries the contents of memory locations. The width of the data bus determines the word-size of the computer. Note that although each memory location holds 1 byte of data, a computer with a word-size of 32 bits, for example, can be considered to hold 32 bits of data in each location, for the contents of some ‘location’ are considered to consist of the contents of 4 contiguous bytes of memory.

Question 36

what is the role of the control bus?

Answer 36

The control bus is used to transfer information between the CPU and various other devices within the processor. Typical information includes signals saying whether data is being read or written and de-tailing information transmitted from input/output devices.

Question 37

what is the relationship between cost and performance of memory and physical distance from the cpu?

Answer 37

The cost and performance of memory is generally proportional to its physical distance from the CPU.

Question 38

what is the hard disk?

Answer 38

The hard disk usually consists of rapidly rotating disks with magnetic heads (although solid state drives, which have no moving parts, are becoming more common). Hard disks are used for secondary storage and tend to be cheap but relatively slow.

Question 39

what is dynamic RAM?

Answer 39

Dynamic RAM (DRAM) is where a bit of data is stored using a transistor/capacitor combination. It is relatively cheap although it needs to be refreshed (because capacitors tend to ‘leak’) and is slow.

Question 40

what is static ram?

Answer 40

Static RAM (SRAM) is where a bit of data is stored by a flip-flop, which incorporates 4-6 transistors. It is stable and fast although takes up more space.

Question 41

what is caches?

Answer 41

Caches are expensive memory that are used to store rapidly accessed items. They are generally organised hierarchically into levels. A level1 cache usually consists of static RAM and is built into the CPU. A level 2 cache again usually consists of static RAM and might be either built into the CPU or be at a short physical distance away.

Question 42

what are registers in computer science terms?

Answer 42

Registers are on-chip memory locations that are limited in number(the actual number results from a design decision) and are the ‘bricks’ of computer construction. Processor registers are at the top of the memory hierarchy and provide the fastest way to access data.

Question 43

what are the accumulator?

Answer 43

The accumulator is a special register which temporarily stores the results of arithmetic and logical operations (on data in registers).

Question 44

what are the program counters?

Answer 44

The program counter is a special register that holds the memory address where the next instruction can be found.

Question 45

what is the basic processor operation fetch-decode-fetch-execute cycle?

Answer 45

the ‘instruction fetch’ phase involves the supply of the instruction ad-dress (via the address bus) and the return from memory (via the data bus) of the instruction; * next, the ‘instruction decode’ phase involves interpreting the stored instruction within the CPU; * next, the ‘operand fetch’ phase involves the supply of the address of any required data (via the address bus) and the return from memory(via the data bus) of this data; and finally * the ‘execute instruction’ phase involves the CPU performing the necessary actions (this phase is sometimes split into two with the ‘execute instruction’ phase followed by a ‘write-back’ phase where data is writ-ten back to memory, if needs be)

Question 46

what occurs during the instruction fetch stage?

Answer 46

The CPU outputs the value of the program counter (the address of the next instruction to be executed) on the address bus. Memory reads the address bus and puts the contents of the particular memory address onto the databus; that is, the instruction to be executed. The actual instruction is stored in instruction registers within the CPU.

Question 47

what occurs during the instruction decode stage?

Answer 47

The instruction word stored in the instruction registers is decoded by the internal logic to provide control signals to the ALU and to other internal circuits inside the CPU. These control signals essentially tell the ALU what to do in order to execute this instruction. The program counter value is pushed onto the address bus. The ALU (having read the program counter from the address bus) increments this value by the word-size (in bytes) and puts it back into the program counter; so, the program counter now contains the address in memory of the next instruction to be executed (or so it thinks).However, and as we’ll see, the value in the program counter might change.

Question 48

what occurs during the operand fetch?

Answer 48

The instruction registers provide the address of the data to be processed to the address bus; that is, the operand address. Memory supplies the operand data to the data bus and thus to the CPU, ready for processing by the ALU.

Question 49

what occurs during the execute instruction stage?

Answer 49

Processing is performed on the operand by the ALU, according to the instruction, and the result (if any) is put back into the accumulator. Also, it might be the case that the program counter is updated; for the instruction just executed might have been a branch instruction and the next instruction might actually be in a different memory location to that expected.

Question 50

what occurs during the write back stage?

Answer 50

The result from the accumulator is written back into memory (via the databus). In many processors, the write-back is separate from the execute.

Question 51

how does shared memory work in multicore processors?

Answer 51

shared-memory, where different processors communicate with one another by writing and reading messages left in shared-memory locations

Question 52

how does distributed memory work in multicore processors?

Answer 52

processors are connected according to some interconnection net-work (e.g., as a ring or a mesh) and communicate by message-passing.

Question 53

what are the advantage of multicore computing about power?

Answer 53

Multi-core computing allows for the use of more and slower processors, with a consequent drop in heat generation and power consumption in comparison with one fast, high-power processor.

Question 54

what memory architecture is general purpose graphics processing units?

Answer 54

GPGPU are shared memory devices

Question 55

what is the instruction set architecture?

Answer 55

the interface between hardware and software. It is the view the programmer has of hardware and includes everything programmers need to know in order to control the processor/

Question 56

what are the different parts of the ISA?

Answer 56

the organisation and structure of programmable storage (namely the registers and main memory that is useable by the programmer); the instruction sets and formats (namely the processor instructions available to the user in order to access and manipulate data residing in memory); the methods for addressing and accessing data items within memory, e.g., absolute (‘go to this location’), indirect (‘go to the location stored in this location’), using offsets (’go to this location plus this offset number’); and* the process of execution, e.g., the fetch-decode-fetch-execute cycle.

Question 57

what is the primary component of the instruction set archistructure ( ISA)

Answer 57

the assembly language, a high-level program is compiled first into assembly language and then into machine code. Assembly language instructions are very low-level and facilitate the subsequent translation into machine code.

Question 58

what is the typical ISA?

Answer 58

MIPS, microprocessor without interlocked pipeline stages

Question 59

what are the assumptions about MIPS

Answer 59

We assume that: * memory has 232 memory locations (so, our address bus is 32 bits wide); * words are 4 bytes long (so our data bus is 32 bits wide); * when we request the contents of a memory address m, the contents of memory locations m, m + 1, m + 2 and m + 3 are returned; and* there are 32-bit registers $zero (which always holds 0), $s1, $s2, . . .,$s7.

Question 60

what is an operating system?

Answer 60

An operating system provides the interface between different programming applications and hardware. the operating system manages a machine’s resources, e.g., processor cycles, memory and devices such as modems, disks, network interfaces, video interfaces and so on, so that they are used efficiently and safely.

Question 61

why is an operating system needed?

Answer 61

The whole need for an operating system resides around the fact that although a computer generally has one CPU, nevertheless it is concurrently undertaking a whole series of tasks (even when a computer has more than one processor, there are usually more processes executing than there are processors).

Question 62

what are the main functions of an operating system

Answer 62

1- it virtualises a machine 2- it starts and stops programs 3- it manages memory 4-it handles input and output 5-it maintains and provides access to the file system 6- it deals with networking 7- it maintains security 8- it facilitates error handling and recovery when programs dont do what they are supposed to

Question 63

how does the operating system virtualise he machine

Answer 63

Hardware has low-level physical resources with complicated, idiosyncratic (individual or peculiar) interfaces. An operating system provides abstractions that present clean interfaces so as to make the computer easier to use. Also, virtualization means that the operating system can make a physical machine behave like an idealised virtual machine so as to aid portability.

Question 64

how does the operating system start and stop programs?

Answer 64

The operating system starts and stops programs. For example, it ensures that when a program is stopped, the memory allocated to this program is freed up for use by other programs and the processor is al-located to some other task (which is presumably in some queue waiting for processor access)

Question 65

how does the operating systems manage memory?

Answer 65

the operating system manages memory. To see what we mean by this, consider compiling some C program. The compiled program will require memory so that it might run. However, it may be that the memory required is already being used by some currently executing program. The operating system will ensure that the compiled C program can still run by using memory that the compiled program thinks is the memory requested whereas in reality the memory actually used is different.

Question 66

how does the operating system handles input/output

Answer 66

The operating system handles input/output. Whilst programs are running, users are typing on keyboards, outputs are being sent to screens and so on. The operating system ensures that all of these activities are coordinated. For example, an operating system handles interrupts which might be caused, for example, by pressing some keyboard key and result in the execution of some program being paused or aborted.

Question 67

how does the operating system maintain and provide access to the file system?

Answer 67

The operating system maintains and provides access to the file system. It ensures that programs and users only have access to their own files and not those of others, and that users can access their files in a well-structured way.

Question 68

how does the operating system deal with networking?

Answer 68

The operating system deals with networking. For example, it continuously monitors the network for incoming traffic and sends data packets as output when requested by some program.

Question 69

how does the operating system maintain security?

Answer 69

it maintains security through firewalls and tries to ensure that executing programs dont have access to parts of the system from which they can cause damage

Question 70

what are the three types of instructions?

Answer 70

the I type instruction , the R-type instruction and the J type instruction

Question 71

what does the I type instruction involve?

Answer 71

an I-type instruction involves data transfer: ∗ addi, lw, beq

Question 72

what does the R type instruction involve?

Answer 72

an R-type instruction works on registers: ∗ slt

Question 73

what does the J type instruction involve?

Answer 73

a J-type instruction involves jumps: ∗ j

Question 74

what does a process consist of?

Answer 74

a process consists of a thread or threads (of execution)together with an address space

Question 75

what is a thread?

Answer 75

a thread is a sequence of instructions in the context of a sequential execution (that is, a coordinated execution resulting from some program)

Question 76

what is an address space?

Answer 76

an address space consists of some memory locations (in main memory) that the corresponding process can read from and write to.

Question 77

what is the problem of mutual exclusion?

Answer 77

that is, ensuring that two threads are not in the critical section at the same time, where the critical section is exclusive access to some shared resource such as a memory location.

Question 78

how can the life cycle of a process be represented?

Answer 78

it can be represented as a finite state machine

Question 79

what are the 5 stages of the life cycle of a process?

Answer 79

* new: the process is being created; * ready: the process is not executing on the CPU but is ready to execute; * running: the process is executing on the CPU; * blocked: the process is waiting for an event (and so not executable);and * exit: the process has finished.

Question 80

what are the 6 state transistions in the life cycle of a process?

Answer 80

* admit: the control overheads as regards a process have been set up and the process is moved to the run queue; * dispatch: the scheduler allocates the CPU to an executable process(the scheduler is the component of the operating system that deter-mines which processes should be run and when); * timeout/yield: the executing process is forced to/volunteers to re-lease access to the CPU; * event-wait: a process is waiting for an input/output event, for example, and gives up access to the CPU; * event: an event occurs and wakes up a process; * release: a process terminates and releases access to the CPU (and other resources)

Question 81

what is a process control block?

Answer 81

A process control block (PCB) is a data structure that the kernel uses in order to manage a process.

Question 82

what does a process control block consist off?

Answer 82

* the process’s unique ID; * the current state of the process (new, exit, ready, etc.); * CPU scheduling information such as the process priority, whether there are events pending and so on; * the program counter, detailing the next instruction to be executed (this is only available for processes that are not running, having been paused for some reason); * the current values of other CPU registers (again, this is only available for processes that are not running, having been paused for some reason); * memory management information, such as the (current) location of the address space; * scheduling and accounting information, such as when the process was last run and the amount of CPU time that has elapsed so far; and* a reference to the next and previous PCB in the list of PCBs.

Question 83

what does an R type instruction consist off?

Answer 83

an opcode (operation code) , a first source register, a second source register, a destination register, a shift amount for shift instructions, a function

Question 84

what does a J type instruction consist off?

Answer 84

an opcode (operation code ) and an address is the memory to jump to

Question 85

give an example of a R type instruction ?

Answer 85

slt

Question 86

give an example of a J type instruction?

Answer 86

j

Question 87

give an example of an I type instruction

Answer 87

addi

Question 88

what does an I type instruction consist off?

Answer 88

an operation code, a source register, a destination register, an adress