Test 3 Flashcards

1
Q

assuming enough resources
(2-input AND gates) are available, ALL partial products (PPs) are calculated

A

concurrently

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2
Q

in a binary multiplication, which bits of the final product are calculated first?

A

the LSbits

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3
Q

Binary multiplication can be implemented in custom hardware (HW) or (SW)

A

true

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4
Q

when is the value of the PP zero?

A

when the associated multiplier bit is 0

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5
Q

the most time consuming operation in a binary multiplication is

A

the multi-operand addition of the PPs

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6
Q

in the SSRM discussed in class, the PH-reg is initialized to

A

0

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7
Q

in the SSRM discussed in class the M-reg stores the value

A

of the original Multiplicand

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8
Q

in the SSRM described in class a new PP is generated using

A

2-to-1 muxes

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9
Q

in the SSRM discussed in class, which sequence of operations are repeated?

A

Add- shift-right

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10
Q

in the SSRM mPL-Reg is used to store

A

the remaining bits of the multiplier and the incoming LSbits of the FP

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11
Q

How many different data sets can the PSRM described in class process concurrently?

A

4

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12
Q

the PSRM improves

A

throughput

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13
Q

in each stage of the PSRM which operations are executing during every machine cycle?

A

add and shift right

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14
Q

in each PSRM stage the PP is generated using

A

2-input AND gates

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15
Q

on average, division takes longer than multiplication

A

true

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16
Q

the generate function indicates that a carry-out of ‘1’ will be generated by the stage

A

no matter what the carry-in value is

17
Q

compared to RCA, a CLA uses:

A

more hardware resources

18
Q

what is the RCAs biggest performance problem

A

the propagation of the carry values from one state to the next

19
Q

how many gate-level propagation delays are in a generic Sum-Of-Products (SOP)?

A

2

20
Q

if the propagate function p = ‘1’ then the carry-out value will be ‘1’ if:

A

the carry-in value is ‘1’

21
Q

at the cost of additional and acceptable propagation delay, the second-level carry-look-ahead reuses computation results in the form of:

A

Gj and Pj

22
Q

in an attempt to tradeoff cost/performance we can combine carry look-ahead and ripple-carry in the same adder unit

A

true

23
Q

what is a practical limit for the number of inputs to a (static) CMOS gate?

A

4

24
Q

how many gate-level propagation delays does it take to compute the sum bit of a stage in a RCA or CLA from the moment the cin to that stage is available

A

1

25
Q

comparing a n-bit CLA to a n-bit RCA

A

the CLA is faster, but uses sign9ificant more hardware resources

26
Q

in a positional number system, the position of a digit

A

represents the weight it carries

27
Q

to convert a number to an IEEE floating point format, the number is first normalized. the integer part of the normalized value:

A

is not stored, but implied when the value of the number is being reconstructed

28
Q

in the IEEE floating formats, the stored exponent is stored in an excess form. this means that the actual exponent value is equal to:

A

the stored exponent value minus excess values

29
Q

to be able to use floating points numbers in manipulation, these have to be:

A

unpacked -> manipulated -> packed

30
Q

in a weighted number system, the value of a number is equal to:

A

the Sum-Of-Products between each digit value and the radix (or base) raised to the power of its position

31
Q

the behavioral description of the SSRM CU uses if-else and/or case constructs. which of the following is NOT used in the condition evaluations of these constructs?

A

DONE

32
Q

the SSRM CST captures ONLY se3quential events

A

false

33
Q

why is the external user control input START necessary?

A

so that the SSRM knows when a new set of input operands is valid and ready to be manipulated

34
Q

if the multiplicand is n-bits wide and the multiplier is m-bits wide, how many times is the add-shift sequence repeated in the SSRM?

A

m

35
Q

in the lecture SSRM ASM chart we initialized n = 4 and counted down to 0. if we would initialize n = 0, we would need to

A

count up to 4