Test 1 Flashcards
Generations of Computers
0th: Mechanical Computers
1st: Vacuum Tubes
2nd: Transistors
3rd: Integrated Circuits
4th: Large scale integration
5th: Low-Power invisible computers
Design Principles in modern computers
- All instructions are directly executed by hardware.
- Maximize the rate at which instructions are issued.
- Instructions should be easy to decode
- Only loads and stores should reference memory
- provide plenty of registers
Pipelining
Mic-3 and Mic-4. It adds extra latches (registers) in the buses so that several instructions can be processed at the same time at various stages.
Understanding Primary Memory
Registers - Lowest Level. In the chip
Cache - 3 levels. L1 is on the chip. L2 is in the CPU package. L3 is on the processor board
RAM - Additional chip separate from CPU
Hamming Code
(do an example on the whiteboard)
RAID
Redundant array of independant discs. (p96)
- 4 discs, 12 strips
- 8 discs, 24 strips (half are duplicated)
- 7 discs, 1 bit in each disc
- 4 discs + 1 for parity bit
- 4 discs split by strips (not bits) + 1 with parity bits
- 5 discs, parity bits split along different discs.
basic gates and circuits
(do example on whiteboard) NOT: Triangle + circle NAND: Curved + circle NOR: Pointy + circle AND: Curved OR: Pointy
multiplexers
A way to select one data stream out of 8. 8 input streams, and an 3 bit input to choose which one gets through.
shifters
Shifts bits from left to right.
1100 shift right = 1110 (add 1)
1100 shift left = 1000 (add 0)
adders
adds two bits, output the sum and a carry bit
0 + 0 = 0 carry 0
0 + 1 = 1 carry 0
1 + 1 = 0 carry 1
ALU
Arithmetic Logic Unit. Performs arithmetic operations. In the CPU chip. Contains a decoder, a logical unit, and an adder.
Laches
two inputs. two outputs which are always opposites. It will become unstable if both inputs are 1.
clocked: only lets inputs through a clock pulse.
D-latches: a clocked latch with only one input.
Flip-flops
Sends a short pulse.
Micro architectures
see example in book
ways of improving performance
- Cache, and using it efficiently
2. Branch Prediction: When pipelining, processor guesses what the next operation is before it actually know.
risc
risc did not use interpreter (fetches, examines and executes another program), so it is not backwards compatible, and doesn’t have many instructions. Can execute many at a time because of pipelining.
cisc
Much more complicated instructions than risc. Also slower.
