TB2 Flashcards
Computer Architecture
Those attributes that have a direct impact on the logical execution of a program
Computer Organisation
Refer to operational units and their interconnections that realise the architectural operation
Computer Structure
The way in which the components are interrelated.
. Central Processing Unit (CPU)
. Main Memory
. I/O
. System Interconnection (Buses)
Computer Function
The operation of each individual component as part of the structure
Computer Functions
Data Processing
Data Storage
. Short-term
. Long-term
Data Movement
. Input/Output (I/O)
. Peripheral
. Data Communication
Control
Central Processing Unit (CPU)
Control Unit
Arithmetic & Logic Unit (ALU)
Registers
CPU interconnections
The First Generation : Vacuum Tubes
ENIAC (Electronic Numerical Integrator And Computer)
World War II
University of Pennsylvania
30 tons, 1500 square feet, 18000 vacuum tubes, 5000 additions per second
Decimal (not binary)
Manual programming
Von Neumann Machine
Stored-program concept
IAS (Institute of Advanced Study) computer
1946 - 1952
Binary
IAS Computer
Stored-program concept
Main three key concepts:
. Single read–write memory (Data and Instructions)
. Addressable Memory
. Execution occurs in a sequential fashion (unless explicitly modified) from one instruction to the next.
Structure:
. Main Memory (data & instructions)
. Arithmetic Logic Unit (operating binary numbers)
. Control Unit (interprets the instructions)
. Input/Output
Memory structure
. 1000 locations
. Words (40 bits) - Binary
Registers
Memory Buffer Register (MBR)
Memory Address Register (MAR)
Instruction Register (IR)
Instruction Buffer Register (IBR)
Program Counter (PC)
Accumulator (AC) & Multiplier Quotient (MQ)
Computer function
. Execution of a program (set of instructions)
. Processor execute the instructions:
.Fetch (Read the instructions)
.Execute (Perform the instructions)
. Program execution: Repeating fetch & execute
. Program execution halt
Interconnection structure
. Computer as a network of basic modules
. Paths for connecting the modules
. Structure depends on the exchanges
Interconnection structure - Memory
. N words equal length
. Unique numerical address
. Read/Write data word
. Operation is indicated by read and write control signals
. The location for the operation is specified by an address
Interconnection structure - I/O module
. Similar to Memory (internal point of view): read/write
. Control more than one external device (port - unique address)
. External data path (input/output) with an external device
. Interrupt signals (?!)
Interconnection structure - Processor
. Reading instruction and data
. Write out data after processing
. Use control signals to control the overall operations
. Receive interrupt signals
Interconnection structure - transfers
. Memory to Processor: The processor reads an instruction or a unit of data from memory.
. Processor to Memory: The processor writes a unit of data to memory
. I/O to Processor: The processor reads data from an I/O device via an I/O module.
. Processor to I/O: The processor sends data to the I/O device.
. I/O to or from Memory: I/O module is allowed to ex- change data directly with memory, without going through the processor, using direct memory access.
Bus Interconnection
. Communication pathway connecting two or more devices
. Key characteristics: shared transmission medium(?!)
. Multiple devices connect to the bus, and a signal transmitted by any one device is available for reception by all other devices attached to the bus
. Signal overlap and become garble –> Only one device at a time can successfully transmit
. A bus consist of multiple communication pathways, lines - each transmit signals representing binary 0 or 1 (e.g. 8-bit unit of data –> transmit over 8 bus lines)
. System Bus
Bus Structure - Functional Groups
. Data lines: to provide a path for moving data among system modules:
.Moving data
.Data Bus
.Bus Width - Number of lines
.Data bus width - Key factor in determining overall system performance
. Address lines: to designate the source or destination of the data on the data bus:
.Source/destination of the data on data bus - .Address Bus
.Bus width - Determines the maximum possible memory capacity
.Address I/O ports
.Higher order bits - select module
.Lower order bits - memory location or I/O port
. Control lines: to control the access to and the use of the data and address lines:
. Control the access and the use of the data and address bus
. Control signals:
. Command signals: Specify operation to be performed
. Timing Signals: Validity of data and address information
. Control lines include: Memory write & read, I/O write & read, …
Bus Operation
If one module wishes to send data to another:
. Obtain the use of the bus
. Transfer the data via the bus
If one module wishes to request data from another module
. Obtain the use of the bus
. Transfer a request to other module over the appropriate control and address lines
Point-to-point Interconnection
. Contemporary systems increasingly rely on Point-to-point interconnect
. Bus system problem
. Lower latency, higher data rate, better scalability
. QuickPath Interconnect (QPI - 2008):
.Multiple Direct Connections
.Layered Protocol Architecture
.Packetized Data Transfer
Memory
Computer memory is the area where the computer stores or remembers data (Binary values).
Memory stores information temporarily or permanently and provides the CPU with its instructions.