study for Comp Archi after deep search Flashcards
What does the term ‘computer architecture’ refer to?
o a. The physical layout and electrical design of the hardware
o b. The conceptual structure and functional behavior of the system as seen by the programmer
o c. The applications and software ecosystem of a computer
o d. The arrangement of computers in a network
The conceptual structure and functional behavior of the system as seen by the programmer
Which of the following is an example of a computer organization attribute?
a. The instruction set and data types supported by the CPU
b. The number of bits used to represent addresses
c. The control signals and memory technology used internally
d. The I/O mechanisms and addressing modes
The control signals and memory technology used internally
In the 1950s and 1960s, the academic study of computer architecture was primarily focused on?
a. Computer arithmetic and circuit design for arithmetic operations
b. Instruction set design for optimizing compilers
c. Multiprocessor systems and parallel computing
d. High-level programming languages
Computer arithmetic and circuit design for arithmetic operations
What was a key feature of the IBM System/370 architecture introduced in 1970?
a. It was the first 32-bit microprocessor-based system
b. It maintained the same architecture across a family of models, allowing software compatibility when upgrading hardware
c. It used punch cards instead of electronic memory
d. It was not backward compatible with any previous systems
It maintained the same architecture across a family of models, allowing software compatibility when upgrading hardware
Which of the following is NOT one of the four basic functions of a computer?
a. Data processing
b. Data storage
c. Data movement
d. Data compression
Data compression
data compression is not a fundamental function
Which component of a CPU is responsible for coordinating and managing the execution of instructions?
a. Arithmetic Logic Unit (ALU)
b. Control Unit
c. Registers
d. System bus
Control Unit
The Instruction Set Architecture (ISA) of a computer is best described as?
a. The physical circuit design of the CPU
b. The interface between software and hardware, defining the machine instructions the CPU can execute
c. The networking architecture of distributed computers
d. The organization of the microarchitecture and pipelines
The interface between software and hardware, defining the machine instructions the CPU can execute
What is the main benefit of using abstraction in computer system design?
a. It allows higher-level programmers to ignore lower-level implementation details, improving productivity
b. It forces programmers to consider hardware details for optimization
c. It eliminates the need for an operating system
d. It restricts the system to a single programming language
It allows higher-level programmers to ignore lower-level implementation details, improving productivity
In a multi-core processor, a ‘core’ is?
a. A single processing unit on the CPU chip capable of independently executing instructions
b. The entire CPU including all its cores
c. A specialized co-processor for graphics
d. The chip’s cache memory
A single processing unit on the CPU chip capable of independently executing instructions
Which of the following is NOT considered one of the main structural components of a computer system?
a. CPU (processor)
b. Main memory
c. Operating system
d. I/O devices
Operating system
Computer Architecture is defined as?
The attributes of a computing system as seen by the programmer, encompassing the conceptual structure and functional behavior of the system
Computer Organization refers to?
The operational units and their interconnections that realize the architectural specifications of a computer
Which device is considered the first fully electronic general-purpose computer?
a. ENIAC (Electronic Numerical Integrator And Computer), built 1943–1946 by Eckert and Mauchly
b. UNIVAC I, built 1951 as the first commercial computer
c. Charles Babbage’s Analytical Engine, designed in the 1800s
d. IBM PC, introduced in 1981
ENIAC (Electronic Numerical Integrator And Computer), built 1943–1946 by Eckert and Mauchly
What key concept did John von Neumann introduce with the EDVAC design?
a. The stored-program concept (storing instructions and data in the same memory)
b. The use of decimal arithmetic in computing
c. The graphical user interface
d. The concept of a microprocessor on a single chip
The stored-program concept (storing instructions and data in the same memory)
Who invented the transistor in 1947?
a. William Shockley at Bell Labs
b. Gordon Moore at Intel
c. John Bardeen and Leon Cooper at IBM
d. Charles Thomson at Texas Instruments
William Shockley at Bell Labs
Which of the following was NOT an advantage of transistors over vacuum tubes?
a. Transistors were smaller and produced less heat than vacuum tubes
b. Transistors were cheaper and more reliable than vacuum tubes
c. Transistors allowed faster switching speeds than vacuum tubes
d. Transistors were slower than vacuum tubes, reducing performance
Transistors were slower than vacuum tubes, reducing performance
What was the first successful commercial computer?
a. UNIVAC I (Universal Automatic Computer)
b. ENIAC
c. IBM 701
d. PDP-8
UNIVAC I (Universal Automatic Computer)
The third generation of computers was characterized by the use of?
a. Integrated Circuits (ICs) combining multiple transistors on a chip
b. Vacuum tubes
c. Mechanical relays
d. Microprocessors
Integrated Circuits (ICs) combining multiple transistors on a chip
What does Moore’s Law predict in the context of computer hardware?
a. The number of transistors on a chip doubles approximately every year (or 18 months), leading to exponential growth in computing power
b. Computer memory speeds will double every year
c. Software complexity doubles every 18 months
d. The performance of a single core will double every month
The number of transistors on a chip doubles approximately every year (or 18 months)
Which Intel microprocessor, released in 1974, was the company’s first general-purpose microprocessor?
a. Intel 4004 (4-bit, 1971)
b. Intel 8008 (8-bit, 1972)
c. Intel 8080 (8-bit, 1974)
d. Intel 8086 (16-bit, 1978)
Intel 8080 (8-bit, 1974)
What is pipelining in the context of processors?
Breaking the instruction execution into multiple stages so multiple instructions are in progress simultaneously
What is superscalar execution in modern processors?
a. The ability to execute instructions out of order
b. The ability to issue and execute more than one instruction in the same clock cycle (multiple pipelines in parallel)
c. The use of vector or array processors for single instructions
d. A form of speculative execution
The ability to issue and execute more than one instruction in the same clock cycle
Branch prediction is a technique used in CPUs to?
a. Guess which way a conditional branch will go and preload the likely next instructions to avoid stalling
b. Execute both paths of a branch and discard one
c. Predict the outcome of arithmetic operations
d. Delay branch execution until the result is known
Guess which way a conditional branch will go and preload the likely next instructions
Which is a common solution to mitigate the processor-memory speed gap?
a. Implementing a cache hierarchy (small, fast memory) between the CPU and main memory
b. Removing main memory and using only CPU registers
c. Slowing down the CPU clock to match memory
d. Relying solely on software optimizations
Implementing a cache hierarchy (small, fast memory) between the CPU and main memory
Computer system performance relies on a balance between which components?
a. Processor, main memory, I/O devices, and the interconnection (bus)
b. CPU, GPU, and cooling system
c. Hardware, software, and users
d. Motherboard, power supply, and chassis
Processor, main memory, I/O devices, and the interconnection (bus)
Which group of components must be balanced to avoid bottlenecks?
a. Processor, main memory, I/O devices, and the interconnection (bus)
b. CPU, GPU, and cooling system
c. Hardware, software, and users
d. Motherboard, power supply, and chassis
Processor, main memory, I/O devices, and the interconnection (bus)
For optimal performance, the CPU, memory, I/O, and the interconnects between them should be balanced so one subsystem does not limit the others.
What major issue limits simply pushing clock frequencies higher in a CPU?
a. Power and heat dissipation problems grow as clock speed and transistor density increase
b. The speed of light imposes an upper limit on clock frequency
c. Users cannot perceive differences beyond a certain speed
d. High clock speeds confuse the operating system
Power and heat dissipation problems grow as clock speed and transistor density increase
Higher clock rates and density lead to significantly increased power consumption and heat generation, making it difficult to cool the processor.
According to Amdahl’s Law, what limits the overall speedup of a program when only part of it is improved?
a. The fraction of the program that cannot be improved or parallelized
b. The total number of processors available
c. The size of the program’s codebase
d. Memory bandwidth
The fraction of the program that cannot be improved or parallelized
Amdahl’s Law states that the maximum speedup is limited by the portion of the execution that remains serial or unimproved.
What does Amdahl’s Law imply about using multiple processors/cores on a task?
a. Diminishing returns: beyond a certain point, adding more processors yields smaller and smaller speedup gains
b. Linear scaling: performance doubles with every additional core
c. Multiple processors will always outperform a single processor, regardless of workload
d. Only tasks with no serial portion can benefit from multiple processors
Diminishing returns: beyond a certain point, adding more processors yields smaller and smaller speedup gains
As the number of processors N increases, the speedup approaches an asymptote of 1/(1–f), where f is the fraction of work that can be parallelized.
Why have CPU designers moved toward multi-core processors rather than continuing to increase single-core clock speeds indefinitely?
a. Physical limitations like power dissipation and heat (and only so much instruction-level parallelism) make it inefficient to keep increasing clock speed, so using multiple cores provides additional performance through parallelism
b. It’s simply cheaper to put multiple slow cores on a chip than one fast core
c. Users demanded more cores for marketing reasons
d. Multi-core designs use less software complexity
Physical limitations like power dissipation and heat make it inefficient to keep increasing clock speed
Using multiple cores provides additional performance through parallelism.
To fully benefit from a multi-core or multiprocessor system, software must:
a. Be adapted or written to execute in parallel (e.g. multi-threaded), dividing work among the cores
b. Be written in assembly language
c. Use only one thread to avoid overhead
d. Run at a low priority
Be adapted or written to execute in parallel (e.g. multi-threaded), dividing work among the cores
Software needs to be designed for parallel execution to utilize multiple cores effectively.
What is pipelining in processor design?
A technique in which the execution of an instruction is split into separate stages, allowing multiple instructions to overlap in execution
This increases the instruction throughput of the CPU.
What is Amdahl’s Law?
A formula that gives the theoretical maximum speedup for a task when only part of the task is improved or executed in parallel
It highlights diminishing returns when optimizing only portions of a workload.
What is the difference between response time and throughput in computer performance?
Response time is the time it takes to complete a single task, while throughput is the number of tasks completed per unit time
Improving one can often improve the other, but they are distinct metrics.
Why is comparing processors solely by clock speed often misleading?
a. Different processors do different amounts of work per clock cycle (e.g. due to pipelining, superscalar execution, etc.), so a higher clock rate doesn’t always mean higher performance
b. Clock speed specifications are frequently inaccurate
c. All processors have the same performance at a given clock speed
d. Faster clock speeds always reduce instruction counts
Different processors do different amounts of work per clock cycle, so a higher clock rate doesn’t always mean higher performance
Processors vary in how many instructions they execute per cycle.
What is CPU execution time (CPU time) for a program defined as?
a. The time the CPU spends actively executing the program’s instructions (excluding waiting for I/O or OS tasks)
b. The total wall-clock time from program start to finish, including I/O waits
c. Always the same as the real elapsed time
d. The time from when the computer is powered on to when the program ends
The time the CPU spends actively executing the program’s instructions
This excludes waiting for I/O or OS tasks.
Which changes will improve (decrease) a program’s CPU execution time?
a. Reducing the number of instructions the program executes (e.g., using a better algorithm or compiler optimizations)
b. Reducing the CPI (cycles per instruction) by designing a more efficient CPU that executes instructions with fewer cycles on average
c. Increasing the clock rate (decreasing the clock cycle time) so that each cycle is faster
d. All of the above
All of the above
Reducing the number of instructions, reducing CPI, or increasing the clock rate will all improve performance.
What does CPI stand for?
a. The average number of clock cycles each instruction takes to execute for a given program
b. The number of instructions executed per second
c. The clock frequency measured in cycles per second
d. The number of CPU cores per chip
Cycles Per Instruction
It is the average number of clock cycles each instruction takes to execute for a given program.
What does MIPS stand for, and what does it measure?
a. MIPS stands for Millions of Instructions Per Second, and it measures the instruction execution rate of a computer.
b. Memory Index Per Segment, measuring memory speed
c. Microprocessor without Interlocked Pipeline Stages (a type of CPU design)
d. Millions of Interrupts Per Second, measuring I/O interrupt handling
Millions of Instructions Per Second; it measures the instruction execution rate of a computer
MIPS indicates how many million instructions a processor can execute per second.
What is a known drawback of using MIPS as a performance metric?
a. It does not account for differences in instruction sets; different CPUs may do more or less work per instruction.
b. MIPS can vary between programs on the same machine – a machine doesn’t have one fixed MIPS value.
c. A higher MIPS rating doesn’t always mean better actual performance (e.g., a CPU might execute many simple instructions quickly but handle complex tasks slowly)
d. All of the above.
It does not account for differences in instruction sets; different CPUs may do more or less work per instruction
MIPS can vary between programs on the same machine.
What is the purpose of standardized benchmark suites like SPEC CPU2006?
a. To provide a set of representative programs that can be run on different systems to compare their performance
b. To test only the graphics performance of a system
c. To tune a system’s clock speed automatically
d. To measure network throughput
To provide a set of representative programs that can be run on different systems to compare their performance
These benchmarks measure and compare the performance of different computers in a consistent way.
The system clock of a processor is 2 GHz. Approximately how long is one clock cycle?
a. 0.5 nanoseconds
b. 2 billion seconds
c. 2 nanoseconds
d. 0.5 milliseconds
0.5 nanoseconds
The period of one cycle is 1/(2×10^9) seconds.
Why might a program with mostly simple instructions end up with a higher MIPS rating but not actually run faster?
a. MIPS doesn’t account for the complexity or amount of work done per instruction – a program doing many simple operations can have a high MIPS, even if a program doing fewer, more complex operations finishes sooner
b. The program might be using floating-point operations
c. The CPU might be overheating and throttling
d. This scenario cannot happen – higher MIPS always means faster execution
MIPS doesn’t account for the complexity or amount of work done per instruction
A program with many simple operations can have a high MIPS, even if another program finishes sooner.
What is the average number of clock cycles required to execute one instruction?
CPI (Cycles Per Instruction)
A lower CPI means better performance for a given clock speed.
What does a higher MIPS rating not always mean?
Better actual performance
A CPU might execute many simple instructions quickly but handle complex tasks slowly.
Which of the following is NOT one of the key principles of the von Neumann architecture?
a. Storing program instructions and data in a single, unified memory
b. Memory is addressed by location without regard to the data’s type
c. Sequential execution of instructions unless altered by a special instruction (e.g., a jump)
d. Having separate dedicated memories for instructions and data
Storing program instructions and data in a single, unified memory
Memory is addressed by location without regard to the data’s type.
What is the key principle of the von Neumann architecture regarding memory?
Storing program instructions and data in a single, unified memory
The von Neumann architecture uses a single read-write memory for both instructions and data.
Which of the following is NOT a key principle of the von Neumann architecture?
Having separate dedicated memories for instructions and data
The basic model does not separate memory by content type.
What does the Program Counter (PC) register hold during program execution?
a. The address of the next instruction to be fetched and executed
b. The data most recently read from memory
c. The current instruction being executed
d. The total number of instructions in the program
The address of the next instruction to be fetched and executed
The PC increments after fetching an instruction.
Which of the following is NOT one of the basic categories of actions in an instruction’s execution?
a. Processor–Memory: transferring data between the CPU and main memory (e.g., load or store)
b. Processor–I/O: transferring data between the CPU and an I/O module (reading from or writing to peripherals)
c. Data Processing: performing arithmetic or logic operations on data (within the CPU)
d. Data Visualization: converting data into graphical form for display
Data Visualization
The basic types are: processor-memory, processor-I/O, data processing, and control operations.
What is an interrupt in a computer system?
a. A signal that pauses the normal execution of the CPU so that an external or internal event can be serviced
b. A break in the power supply
c. A special type of subroutine call made by the program
d. A method of doubling the CPU clock speed temporarily
A signal that pauses the normal execution of the CPU so that an external or internal event can be serviced
An interrupt allows other modules to signal the processor to execute an interrupt handler.
Which of the following is NOT a common class of interrupts?
a. Program (e.g., arithmetic overflow, division by zero)
b. Timer (clock interrupts for OS scheduling)
c. I/O (signals from I/O devices indicating completion or errors)
d. Network (packets arriving on a network interface)
Network
Network events typically generate I/O interrupts; common classes are Program, Timer, I/O, and Hardware Failure.
What does the CPU do when an interrupt occurs?
a. It suspends the current program, saves the current context (e.g., the next instruction address and processor state), and jumps to a routine (interrupt handler) to service the interrupt. After handling, it restores the saved context and resumes the program.
b. It immediately restarts the system
c. It ignores the interrupt until the program finishes
d. It sends a signal to memory to clear all data
It suspends the current program, saves the current context, and jumps to a routine (interrupt handler)
After handling, the CPU restores state and resumes the original program.
What is Direct Memory Access (DMA)?
a. A feature that allows an I/O module to transfer data directly to or from memory without continuous CPU involvement, thereby freeing the CPU
b. A memory architecture that uses dual ports
c. A method for the CPU to access cache memory
d. An error-checking technique for memory reads
A feature that allows an I/O module to transfer data directly to or from memory without continuous CPU involvement
DMA frees the CPU for other tasks during large data transfers.
The width of the address bus in a system primarily determines what?
a. The maximum memory capacity that the system can address (access)
b. The speed of data transfer on the bus
c. The size of each memory word
d. How many devices can be connected to the bus
The maximum memory capacity that the system can address
A wider address bus allows addressing of more memory locations.
What effect does the width of the data bus have on system performance?
a. It determines how many bits of data can be transferred in one bus cycle – a wider data bus means more data (or a larger portion of an instruction) can be moved at once
b. It sets the number of addresses available
c. It controls the clock speed of the CPU
d. It has no effect on performance
It determines how many bits of data can be transferred in one bus cycle
A wider data bus can improve performance by fetching more bits per transfer.
What kind of system interconnection is Intel’s QuickPath Interconnect (QPI)?
A point-to-point interconnect that directly connects components with high-speed links
QPI eliminates the bottleneck of a single shared bus.
Define an interrupt.
A signal or event that causes the processor to temporarily halt its current execution flow
Interrupts can be generated by hardware or software and allow the CPU to respond to asynchronous events.
What is the role of the DMA controller?
To access main memory directly, independently of the CPU
The CPU sets up the transfer parameters, and the DMA controller manages the data transfer.
Fill in the blank: An interrupt allows the CPU to respond to _______.
asynchronous events
True or False: The CPU ignores interrupts until the program finishes.
False
The CPU suspends the current program to handle interrupts.
