Structure And Function Flashcards
Explain how pipelining in a CPU could speed up the execution of a program.
An instruction can be fetched as the previous one is being decoded …
… and the one before that is being executed
Describe one issue a selection may cause for a CPU using pipelining
could be followed by one of two possible instructions, which one will only be determined at execution
Meaning the wrong one may be fetched / decoded
Address bus
…carries the location address (register) where the data is going (to or from)
Data bus
carries the data (from one place to another)
Control bus
transmits control signals from the control unit (to other parts of the processor)
Pc
–Is needed to store the address of the next instruction (to be processed)
–Value is then sent to the MAR
–After sending the value the PC is incremented / changed to address held in CIR if the operation is a Jump
Mar
Contains the address of the instruction (to be accessed in memory)…
– …address of instruction sent from PC – Contains the address of the data (to be accessed in memory)…
– …address of data sent from CIR
MdR
Contains the instruction which has been accessed from memory
– Contains the data which has been accessed from memory
– That is referenced by the MAR / Instruction sent to CIR
– acts as a buffer
Two ways the accumulator is used
Temporary storage
for data being processed / during calculations
I/O in processor…
… used as a buffer / gateway
Describe the control unit
□ Decodes instructions. [1]
□ Sends control signals to coordinate movement of data through the processor / execute instruction. [1] □Controls buses [1]
How does large cache memory improve processors performance?
More space for data / instructions in cache memory
RAM needs to be accessed less frequently
Accessing cache is quicker than accessing the RAM
Explain Ram
Random Access Memory (1)
A form of primary memory (1)
Used to hold data and / or programs in use (1)
Volatile / Loses its contents when power is lost. (1)
