Static Branch Prediction

Question 1

Control Hazards

Answer 1

Can also be called branch hazards. When the pipeline makes a wrong decisions when predicting branch taken or not taken and has the wrong instructions in the pipeleine.

Question 2

Structural Hazard

Answer 2

Two instructions in the pipeline access the same resource. Resolve by executing in series, done by stalling.

Question 3

Every instruction has a unique PC. True or False?

Answer 3

True. That is why we can use the PC to index in the predictor table

Question 4

1 and 2 bit saturating counter

Answer 4

You update the prediction after every outcome. When it hits 0 and 1 OR 00 and 11, it cannot go higher. So it stays the same.

Question 5

Branch prediction buffer

Answer 5

indexed by some sort of address

Question 6

Branch target buffer

Answer 6

has a tag and partial data of target location for instructions. Use tag to find matching PC address with same tag bits.

Question 7

Aliasing

Answer 7

When two or more branches with different PC mapped/access the same row in the predictor table

Question 8

Return Address Stack

Answer 8

A FIFO stack. Before a branch instruction branches/jumps, the PC+4 address is saved to the RAS stack. When an instruction returns, the top value of the stack is taken

Question 9

Interrupts and Exceptions can occur at any stage of the pipeline. True or false?

Answer 9

True. The program can trigger an interrupt at any instruction and the program might get set an interrupt by the computer anytime.

Question 10

Precise State/Precise Interrupts

Answer 10

When the OS saves the current processor state including the architecture register values and current PC in order to return to the right state. The instructions following the i that caused the interrupt are turned to NOPs.

Question 11

History bits

Answer 11

history bits means it can predict the outcome based on previous sets of outcomes

Question 12

1 bit state machine with 1 history bit

Answer 12

able to learn the outcome if the previous outcome was 0 or 1. Learns the outcome when the history is 1 or 0.

Question 13

2 level predictor with 2 history bits

Answer 13

able to learn the outcome based on two previous outcomes.

Question 14

Size of pattern history table

Answer 14

if size of pattern history table&raquo_space; no. of instructions in program, there will be no aliasing. Every 2^n instructions will index to the same entry.

Question 15

Gap

Answer 15

global history register (so it includes history for all branches) + private predictor tables (the state of every branch is seperate)

Question 16

Pag

Answer 16

private pattern history table (patterns from every branch) + global predictor table

Question 17

Pap

Answer 17

private pattern history table + private predictor tables.
For each branch we track the behaviour of that branch and control the behaviour on its own.