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CS 6210 > SPIN, Exokernel, Microkernel > Flashcards

SPIN, Exokernel, Microkernel Flashcards

1
Q

What are the overall characteristics of a microkernel?

A
  • Provides abstractions to resources/OS core services
  • Each service is its own address space
  • Microkernel serves as the middleman between services and OS services
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2
Q

What are the downsides of microkernels?

A
  • Potential for performance loss due to extra border crossings from services to OS service
  • High communication overhead
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3
Q

Goals of extensibility

A

To be able to be:

  • Thin like microkernel
  • Access to resources without border crossings
  • Flexible
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4
Q

Previous approaches to extensibility

A
  • HydraOS
  • Microkernels
  • Cross domain communication
  • Little languages
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5
Q

What was SPIN’s approach to extensibility?

A

Use language features to extend OS

Language used was Modula-3

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6
Q

What are the characteristics of SPIN?

A
  • Kernel is minimal, but extendable (avoids border crossings)
  • Compiler enforces modularity
  • Logical protection domains (not hardware address space)
  • Dynamic call binding (ensures flexibility)
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7
Q

How is SPIN customizable?

A
  • Defines interfaces to subsystems

- Just need to specify: start, create, resolve, combine

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8
Q

What are SPIN extensions?

A
  • Pieces of code that reside above SPIN
  • Definitions of interfaces to subsystems
  • Customizable
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9
Q

What are program discontinuities?

A
  • Page fault
  • External interrupts
  • System calls
  • Exceptions
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10
Q

How does SPIN handle program discontinuities?

A

Passes program discontinuities to library OS as events through event handlers/procedure calls

Doing so avoid context switches

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11
Q

What do core services do in SPIN?

A
  • Provide access to hardware mechanisms

- Does involve stepping outside the language to control hardware resources

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12
Q

What are core services in SPIN?

A
  • Memory management (physical, virtual, translation)

- CPU scheduling (app level, processor level, global)

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13
Q

What sorts of services does SPIN require definition for for memory management?

A
  • Physical: allocate, deallocate, reclaim
  • Virtual: allocate, deallocate
  • Translation: create/destroy address space, add/remove mapping
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14
Q

What sorts of services does SPIN require definition for for CPU management?

A
  • Strand: abstraction for scheduler entity defined by app thread package
  • Event handlers: block/unblock, checkpoint, resume
  • Global scheduler: interacts with app thread packages
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15
Q

How does SPIN handle protection?

A

Through extensions. Extensions to core services only affect the applications that use the extension

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16
Q

What does SPIN achieve in terms of extensibility, protection and performance?

A
  • Achieves as good performance as monolithic OS

- Is flexible/extendible

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17
Q

What is Exokernel’s approach to extensibility?

A

Uncouples authorization from use

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18
Q

How does Exokernel achieve extensibility?

A

Secure bindings:

  • Library OS asks for hardware resource
  • Exokernel binds library OS to hardware resource
  • Exokernel exposes hardware resource to library OS via encrypted key
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19
Q

How are Exokernel secure bindings implemented?

A
  • Hardware mechanisms (TLB entry)
  • Software caching (shadow TLB)
  • Downloading code directly into the kernel
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20
Q

How does software caching work within the context of Exokernel?

A

Each library OS has a “shadow” TLB to reduce start up penalty

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21
Q

How does Exokernel handle memory management?

A
  • Uses shadow TLB
  • Loads STLB into hardware TCB to help with context switches
  • If TCB is warm, it will not miss as often
22
Q

How does Exokernel handle CPU scheduling?

A
  • Uses a linear vector of “time slots”
  • Time quantum (how long each process can be on processor)
  • OS calls a time slot and runs processes for that time slot according to the time quantum
23
Q

How does Exokernel revoke resources?

A
  • Via software interrupt from Exokernel (uses a repossession vector)
  • Library OS allowed to do back up work to write data to disk prior to repossession
24
Q

How often do addresses get translated in Exokernel?

A

On every memory access on CPU

The CPU deals with translating virtual addresses to physical addresses

25
Q

How does Exokernel mitigate border crossings?

A

Can download code into the kernel

Effect: selectively bloats the kernel

26
Q

How does Exokernel handle events?

A
  • A table in the kernel that maps entry points for different event types to the library OS
  • Forwards the events to library OS
27
Q

What metrics are used for performance comparisons?

A
  • System size
  • Microbenchmarks
  • Networking
  • Application level performance
28
Q

What is the difference between SPIN and Exokernel?

A
  • SPIN is an OS
  • Exokernel is neither a microkernel nor an OS
  • Exokernel can be written in any language
  • In SPIN, entire OS is in same hardware space with kernel level privileges
  • In Exokernel, selected code fragments are downloaded into kernel by library OS via secure bindings
29
Q

How does Exokernel and SPIN do in terms of performance comparisons?

A
  • Code size is small
  • Performs as well as monolithic OS
  • Protected procedure calls do as well as sys calls in Unix
30
Q

What was the purpose of the L3 Microkernel Construction paper?

A

To prove that microkernels could be efficient if implemented correctly

31
Q

What are the characteristics of a microkernel-based OS?

A
  • Each services exists in its own address space
  • Services are above the microkernel
  • Microkernel gets its own address space
  • Provides simple abstractions for system services, resources
32
Q

Where can performance be potentially lost in a microkernel?

A
  • Border crossings

- Protected procedure calls

33
Q

What are myths about the microkernel that made it “underperform”?

A
  • Kernel-user space switches
  • Address space switches (basis for protected procedure calls)
  • Thread switches and IPC (kernel mediation for protected procedure call)
  • Memory effects (locality loss)
34
Q

How does L3 Microkernel do in terms of performance with border crossings?

A

Including TLB and cache misses, takes about 123 processor cycles

35
Q

How does L3 Microkernel deal with address space switches?

A
  • Don’t have to flush the TLB completely
  • Check address space tag and PID for matches (if no address space tag, can use segment registers)
  • Can share hardware address space for protection domains (segment boundaries enforced by hardware)
  • Good for small protection domains (must flush for large)
36
Q

What is the explicit cost for flushing TLB?

A

The cost of flushing the registers and flushing the TLB

37
Q

What is the implicit cost for flushing TLB?

A

After switching, trying to access previous memory

38
Q

What is the working set?

A

The set of pages that keeps the process happy

39
Q

Why do we have to flush the TLB completely for large protection domains?

A
  • implicit cost&raquo_space; explicit cost

- Switching cost not as important

40
Q

How does L3 Microkernel deal with thread switching and IPC?

A

By construction, competitive to SPIN and Exokernel

Saves volatile state of processor

41
Q

How does L3 Microkernel deal with memory effects?

A

Hardware address space is bigger than the cache

42
Q

How does L3 Microkernel compare to MACH?

A

L3 takes advantage of processor specific features in order to maximize performance

L3 is inherently non-portable as a result

43
Q

Why is MACH’s border crossings so expensive?

A
  • Focus on portability (longer latency for border crossings)
  • Code bloat (large memory footprint)
  • System cache misses dominate
  • Capacity misses dominate
  • Kernel footprint is the culprit, not system services
44
Q

What did modern OSes learn from SPIN, Exokernel and L3 Microkernel?

A
  • Modern OSes adopted microkernel
  • Dynamic loading of device drivers come from extensibility lessons
  • Virtualization is based off of extensibility
  • It is possible to get protection, performance and extensibility
45
Q

What are the benefits of SPIN?

A
  • Logical protection domains enforced by strongly typed language
  • Applications can dynamically bind to different implementations (provides flexibility)
46
Q

What are the drawbacks of SPIN?

A
  • Lots of third party vendors that don’t always use the same language
  • Drivers for hardware access must be accessed outside of the language protection
47
Q

What is contained in the Exokernel shadow TLB?

A
  • Guaranteed VM to PM mappings.

- On context switch, associated S-TLB is loaded into hardware TLB

48
Q

How does Exokernel service a page fault?

A
  • Invokes handler registered for library OS in Processor Environment data structure
  • Library OS finds free page frame, runs page replacement algorithm
  • Library OS calls its hard disk driver to initiate I/O from disk to physical page frame
  • Device driver presents capability to Exokernel for Direct Memory Access
  • Once DMA has been completed, Exokernel upcalls library OS using PE
  • Library OS updates mapping in TLB
  • If valid, Exokernel installs mapping and resumes
49
Q

How does Exokernel handle external interrupts?

A
  • Uses Time Slice vector to identify library OS responsible for handling
  • Every library OS has a Processor Environment data structure with entry points for interrupt handling
  • Every device driver can identify OS it needs to alert
  • If process to be interrupted is not running, is queued up
  • When processor runs, Exokernel will deliver interrupt by upcalling registered interrupt context entry point to OS
50
Q

How do we avoid flushing the TLB during Address Space Switches?

A
  • Provide unique address space IDs to each subsystem so that the address space tagged TLB can be exploited
  • Use kernel threads and hand off scheduling between subsystems to implement protector procedure calls between subsystems
  • Provide efficient memory sharing mechanisms across subsystems so copying overhead is reduced during protected procedure call

CS 6210 (5 decks)

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