slides08 - Synchronization Techniques (2)

Question 1

Memory barriers

Answer 1

• A compiler can reorder instructions for performance
• A memory barrier is a hardware instruction (that tests and sets memory locations atomically/cannot be interrupted) to ensure an order of memory operations

Question 2

Memory models (2)

Answer 2

1. Strongly ordered: memory modification on one processor immediately visible to all other processors
2. Weakly ordered: memory modifications in one processor not immediately visible to all other processors

Question 3

Test_and_set (TAS)

Answer 3

Retrieve current value of a memory and set it to 1 in an uninterruptable instruction

Question 4

Compare_and_swap (CAS)

Answer 4

• Sets the memory variable to the new value only if the current value is same as expected (atomic operation)
• Returns old value

Question 5

Atomic variables

Answer 5

• Variable that can be accessed and modified atomically

Question 6

Semaphore

Answer 6

• Two operations: wait(s) and signal(s)
• Initial value set to any non negative integer
• The initial value determines how many threads can access that variable at once - otherwise they have to wait
• To implement a CS: set semaphore value to 1 so only one process can be in the CS at any given time

Question 7

Monitor

Answer 7

• Similar to a “class” provided by object-oriented languages
• Provides a CS for free -> no need to mutexes/locks
• Define functions inside Monitor x and call like x.func() -> call once to enter CS and when function terminates, exit CS
• No two functions in Monitor x can be executed at the same time
• Monitor provides facilities for threads to sleep inside the monitor - these threads are not active in the monitor
• Condition variables:
  cond var -> can call var.cwait() and var.csignal()

Question 8

Barrier synchronization

Answer 8

• When multiple processes/threads get to a barrier point -> must wait for all to arrive and then execute at the same time