Sequential Logic Flashcards
What are the differences between sequential and combinational logic?
Combinational:
-Outputs determined present outputs only
-No memory
-Adders, multiplexers and encoders
Sequential:
-Outputs determined by past and present inputs
-Memory
-Applies to flip-flops and registers
Define bistables
two stable states provided by feedback
Define Latches
A circuit where the output is held until another input trigger pulse is applied to another state
“A latch is not a bistable” T or F?
F
In an SR latch, when S=1 and R=0, what is Q?
Q=0 so Q’=1
In an SR latch, when both inputs are 1, what does this do?
The previous output value is HOLD
How are flip-flops made synchronous?
They have a clock which triggers the output on different edges of the clock.
What is the purpose of a Gated SR Latch?
-It allows us to enable or disable any response to S/R
-one gate can be used to control 64 bits
In a NOR SR Latch, when both inputs are 0, what does this do?
The inputs hold their previous states.
In a NOR SR latch, what is the output when S and R are both 0
Q and Q’ are don’t care (previous state)
What is the difference between an SR and S’R’ latch?
-The SR latch is made up of two cross-coupled NOR gates and has an Active-HIGH input
-The S’R’ latch is made of two cross-coupled NAND gates and has an Active-LOW input.
Define an edge-triggered flip-flop
A flip-flop that is synchronised to a clock that changes state at the rising edge or negative edge of the clock.
How does a D-type FF function?
The output goes to 1 when the input is 1 and 0 when the input is 0.
-This change only occurs when it is triggered by the postive/negative edge of the clock.
-When CLK is 0, the output remains the same until the next edge of the clock.
How does a JK flip flop work?
J =1 , K = 0, flip-flop SETs to 1
J = 0, K =1, flip-flop RESETs to 0
J = 0, K = 0 flip-flop HOLDS previous state
J = 1, K = 1 flip-flop TOGGLEs state
For state machines, what are the inputs of JK for Qn and Qn+1
Q. Qn+1. J. K
0. 1. 1. X
1. 0. X. 1
1. 1. X 0
0. 0. 0 X