sem 3

Question 1

CPU structure

Answer 1

CPU contains CU, ALU and Registers. CU is manager, manages all the data flow, ALU is the worker, problem solver and does the math, Registers is the storage, stores the instruction and data.

CU sends an address to the memory through the address bus, RAM receives info and sends data through the data bus to the CPU

Question 2

ALU Structure

Answer 2

• Arithmetic and Boolean Logic: mathematician, does the logic
• status flags
• shifter: binary bit shift, for example shift 0001 to left by 1 bit, it is 0010.
• complementor: NOT opertation

Question 3

9 Types of Registers in the CPU

Answer 3

1. General Purpose registers: can be used for anything, multi-purpose
2. data registers: to store the data
3. address registers: Used to hold Address or employed in the calculation of an operand
   address
   Used as a Stack Pointer
4. condition code register: Contains flags or bits set by the processor hardware as the result of operation
5. program counter (PC): – Contains the address of an instruction to be fetched
   – Automatically points to the next instruction after the current
   instruction is fetched
6. Instruction Register: Contains the instruction most recently fetched
7. Memory Address Register (MAR):
   – Contains the address of a location in memory
8. Memory Buffer Register (MBR):
   – Contains a word of data to be written to memory or the word most
   recently read
9. Program Status Word (PSW)
   – Contains a set of bits that includes condition codes
   – E.g. Sign of last result, Zero, Carry-over, Equal, Overflow, Interrupt,
   Supervisor (indicates whether processor is executing in supervisor or
   user mode)

Question 4

How does MAR and MBR work?

Answer 4

1. CPU issues a command (read or write), through the fetch cycle.
   CPU executes instructions and needs to access data stored in the memory (execution cycle)

Question 5

EASy68K

Answer 5

EASy68K allows us to edit, assemble and run 68000 programs in the Windows PC

Question 6

E114

Answer 6

has data registers and address registers.
8 data registers, 8 address registers but the first seven is used for address, last is used for stack pointer.

Data registers, D0 -D7 can have a maximum of 32 bits. Data registers can have 8 bit, 16 bit or 32 bit numbers.

Move.B (moves 8 bit = 1byte)
Move.W (moves 16 bit = 1 word)
Move.L (moves 32 bit = 1 long word)

Address registers
A0 to A6-32 bit
A7, stack pointer- 32bit
Program counter - 32 bit
Status register -16 bit

there are 5 status flags, but we are covering 2, Z, zero flag and N, Negative flag

Question 7

BRA <label> (Branch always)</label>

Answer 7

branch means jumping. specifies which direction u want to jump to.

Question 8

BSR <label> (Branch subroutine)</label>

Answer 8

another term used as a function.

Question 9

BNE <label> (Branch not equal)</label>

Answer 9

jump when it is not equal

Question 10

BMI <label> (Branch on negative)</label>

Answer 10

negative

Question 11

BPL <label> (Branch on positive)</label>

Answer 11

positive

Question 12

JMP <label> (Jump always)</label>

Question 13

RTS <label> (return from subroutine)</label>

Answer 13

only available if u use the BSR