Section A Flashcards

1
Q

Define ‘synthesis’

A

“Generation of a circuit model starting from a less abstract one: a transformation between two model views (e.g. Behavioural –> Structural)”

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
2
Q

What are the three Model Abstraction Levels?

A
  1. Architectural (performs operations)
  2. Logic (evaluates logic functions)
  3. Geometrical (set of geometrical entities)
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
3
Q

Define ‘model’

A

“Representation that shows relevant features without associated details”

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
4
Q

What is the ‘RTL’?

A

“Register Transfer Level” : design level of abstraction below behavioural but above structural, using a subset of the HDL.
Events are defined in terms of clocks.

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
5
Q

How many bits are in a single precision floating point number?

A

32 bits

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
6
Q

List the bit numbers and what they relate to in a single precision floating point number:

A

23 bits: 0 - 22: Mantissa/Fraction
8 bits: 23 - 30: Exponent
1 bit: 31: Sign

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
7
Q

What is the need for Wireload Models (WLMs)?

A

To model and investigate the interconnect delays at higher levels of design.

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
8
Q

What is responsible for interconnect delay?

A

Interconnect capacitance (wiring+routing), and interconnect resistance.

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
9
Q

Which factors, in combination, produce the Total Delay for DSM circuits?

A
  1. Delay due to wires

2. Delay due to cells

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
10
Q

What causes wire delays in DSM circuits?

A

The Resistance.Capacitance (RC) Coefficient (assume => 8ns)

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
11
Q

ANSI/IEEE Floating Point:

A
  • Biased Exponent
  • No leading zeros
  • Implied most significant 1 in the mantissa
  • Binary point of mantissa is immediately after most significant 1
  • Stored part of mantissa is only fractional part
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
12
Q

What is the motivation for using Floating Point notation?

A

Allows representation of very small and very large numbers, which is otherwise restricted with fixed point notation (only integers).

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
13
Q

How can Floating Point be compared to scientific notation?

A

e.g. 10011101 = 1.0011101 x 2^7

first 1 not stored as assumed present, mantissa = 0011101, exponent = 111

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
14
Q

What is the exponent biases in floating point?

A

Single: +127 (2^(8-1) - 1)
Double: +1023 (2^(11-1) -1)

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
15
Q

How is each decimal digit represented in BCD?

A

Each digit is represented by a four bit binary code that varies from 0000 - 1001 (0 to 9)

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
16
Q

If correction is required in BCD, which number do we add and why?

A
  • Add 0110 (decimal 6)

- This produces a carry to by-pass the invalid codes (i.e. 15 - 9 = 6)

17
Q

What is the defining feature of Gray Code?

A

Only one bit changes state when transitioning between adjacent codewords in the sequence

18
Q

What is the purpose of a parity bit?

A

Error detection: A parity bit, or check bit is a bit added to the end of a string of binary code that indicates whether the number of bits in the string with the value ‘1’ is even or odd.

N.B. When added to given set of bits:

‘Even Parity Bits’ ensure that total number of 1s in result is even.

‘Odd Parity bits’ ensure that total number of 1s in result is odd.

19
Q

What is the Datapath?

A

The Datapath is the core of the processor, where computations are performed.

Consists of interconnection of basic combinational functions (e.g. Arithmetic Operations/Logic operators)

20
Q

What makes up a Generic Digital Processor?

A

Datapath, Memory, Control, Input/Output

21
Q

What is the purpose of Memory in a Generic Digital Processor?

A

To store results or fetch data

22
Q

What is the purpose of Control in a Generic Digital Processor?

A

To determine what will happen next in the cycle

23
Q

How to convert a positive binary number to a negative 2’s C?

A
  1. Invert all bits of positive number
  2. Add 1

e.g. +5
0101 -> 1010 -> 1011 = (-5)

24
Q

Why is 2’s C used almost universally?

A

The same hardware (invert, add) can be used for addition and subtraction

25
Q

What is an FSM?

A

Finite State Machine: Any device/computational model that can be in one of a number of finite states at any time.