Section 5 - Computer organisation and architecture Flashcards
what are the internal components of a computer
- processor
- main memory
- address bus, control bus, data bus
- I/O controllers
what is the processor
the processor responds to and processes the instructions that drive the computer
what parts are in the processor
- control unit
- ALU (arithmetic/logic unit)
- registers
what does the control unit do
co-ordinates and controls all the operations carried out by the computer
e.g. FDE
what does the ALU do
the ALU can perform different operations on data
what are registers
memory cells that operate at high speeds
an accumulator is another word for general purpose register, only really used when there is just one register
what is a bus
a set of parallel wires connecting two or more components of a computer
what are the different buses for
- address bus: if the CPU wants to access a particular main memory location
one way (from processor to memory or I/O controller) - data bus: moves around data
travels in both directions - control bus: moves around control signals
travels in both directions
what is an I/O controllers
a device which interfaces between an input or output device and processor
what is von Neumann architecture
a shared memory and control bus is used for data and instructions
what is the stored program concept
instructions are stored in main memory and fetched and executed by the processor
what is Harvard architecture
computer architecture with separate memories and buses for instructions and data
used with digital signal processing (DSP) systems
what are the dedicated registers
- program counter (PC): stores the address of the next instruction to executed
- current instruction register (CIR): holds the current instruction being executed
- memory address register (MAR): holds the address of the memory location of the data being executed on
- memory buffer register (MBR): temporarily stores data read or written from memory
- status register (SR): contains bits that have been set or cleared
what happens in the fetch stage of the FDE cycle
- the address of the next instruction is copied from the PC to the MAR (via the address bus to main memory)
- the instruction held at that address moved to the MBR (via the address bus)
- the contents of the PC is increased by 1
- the contents of the MBR are copied to the CIR
what happens in the decode stage of FDE cycle
- the instruction held in the CIR is decoded
- additional data is fetched is necessary and passed to registers