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Computer architecture > Section 2 Review > Flashcards

Section 2 Review Flashcards

1
Q

What are the four primary memory technologies?

A

DRAM, SRAM, Flash semiconductor memory and magnetic disk

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2
Q

What is flash memory?

A

A special type of memory that lets you save data without needing power

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3
Q

What is wear levelling?

A

A technique used to spread out where data is written so it doesn’t get written to the same spot and eventually wear it out

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4
Q

What is a magnetic disk?

A

Consist of platters to store information. Coated with magnetic material to save data

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5
Q

How is a magnetic disk organized?

A

Each platter is divided into concentric circles called tracks. Each tracks are divided into sectors that contain the information

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6
Q

What is seek?

A

The process of position a read- write head over the proper track of the disk

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7
Q

What is seek time?

A

The time to move the head to the desired track

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8
Q

What is rotational latency?

A

The time for the desired sector of a disk to rotate under the read/write head.

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9
Q

What is transfer time?

A

The time required to transfer a block of bits

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10
Q

What is a direct mapped cache?

A

A cage structure in which each memory location is mapped to exactly one location in the cache

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11
Q

What is a tag?

A

A field in a table used for a memory hierarchy that contains the address information required to identify whether the associated block in the hierarchy corresponds to a requested word

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12
Q

What is a valid bit?

A

A field in a the tables of a memory hierarchy that indicates that the associated block in the hierarchy contains valid data

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13
Q

What is a cache miss?

A

A request for data in the cache that cannot be filled because the data is not present in the cache

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14
Q

What are the four steps to handling a cache miss?

A
  1. Send the original PC value to memory
  2. Instruct main memory to perform a read and wait for memory to complete its access
  3. Write the cache entry, put the data from memory in the data portion of the entry, write the upper bits in tag field and turn valid bit on
  4. Restart the instruction execution which will fetch the instruction, finding it in the cache
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15
Q

What is a write-through?

A

A scheme where writes always update both the cache and the next lower level of the memory hierarchy- to make sure that data is consistent between the two

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16
Q

What is a write buffer?

A

A queue that holds data while the data is waiting to be written to memory

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17
Q

What is write back?

A

A scheme that handles writes by updating values only to the block in the cache, then writing the modified block to the lower level of the hierarchy ch y when the block is replaced

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18
Q

What is a split cache?

A

A scheme in where are level of the memory hierarchy is composed of two independent caches that operate in parallel with each other with one handling instructions and one handling data

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19
Q

What is an example of the Table- cache’s

A

index|V|Tag|Data
000. |Y|10basetwo| Memory(10000basetwo)

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20
Q

What is the formula to find block for direct mapped cache?

A

Block address modulo number of blocks in the cache.
Ex: if cache has eight entries, and address 9. 9 modulo 8 equal 1. It would map to entry 1

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21
Q

What is a fully associative cache?

A

A cache structure where a block can be placed in any location in the cache

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22
Q

What is a set associative cache?

A

A cache structure that has a fixed number of locations(at least 2) where each block can be placed

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23
Q

How is the set associative cache organized?

A

The cache is divided into sets, each set contains a fixed number of blocks. A block from memory is mapped to a specific set using the index field. Within that set, block can occupy any slots

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24
Q

What is the formula to find position in set associative cache?

A

Block number modulo number of sets in the cache entry

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25
What is LRU?
Least Recently Used- a replacement scheme in which the block replaced is the one that has been unused for the longest time
26
What is multi level cache?
Memory hierarchy with multiple levels of caches rather than just a cache and main memory
27
What is the main culprit for stalls? why?
Caches misses Because the CPU needs to go all the way to memory to get the data needed
28
How can we improve the memory system? Why.
By using cache associativity. It gives memory blocks more freedom
29
What is the negative of these two cache associativities?
Direct mapped and fully associative makes it hard to find the block- very slow
30
What cache associativity most system uses now? Why?
Set associative caches Having more slots per set reduces miss rate but it increases hit time
31
What is the tag, offset and index?
Index- tells you the set to look in Tag- identifies the specific block within that set Offset- pinpoints the exact data you need within that block
32
What is AMAT?
Average memory access time A metric that captures the overall impact of cache misses and hits on performance
33
What are the two states for dependable memory hierarchy?
1. Service accomplishment(when service is delivered) 2. Service interruption(service is different from specified service)
34
What is reliability?
A measure of the continuous service improvement from a reference point
35
What is intermittent failure?
It oscillates between service accomplishment and service interruption
36
What is MTTF AND AFR?
Mean time to failure(reliability measure) Annual fail rate(devices)
37
What are the three ways to improve MTTF?
1. Fault avoidance 2. Fault tolerance 3. Fault forecasting
38
What is fault avoidance?
Preventing fault occurrence by construction(prevent errors by implementing strategies)
39
What is fault tolerance?
Designing a system to continue functioning even when components fail- using redundancy
40
What is fault forecasting
Predicting potential creation of faults, allowing the component to be replaced before it fails
41
What is error detecting code?
A code that enables the detection of an error in data
42
What is a system virtual machine?
Presents the illusion that the users have an entire computer to themselves, including a copy of the operating system
43
What is a VMM?
Virtual machine monitor- the software that supports the VM’s
44
What is the host?
The underlying hardware platform
45
What are the two benefits of VM’s?
1. Managing software- provides an abstraction that can run software stack and old Operating systems 2. Managing hardware - allow separate software stacks to run independently but share hardware
46
What are the two requirements of a VM Monitor?
1. Guest software should behave on a VM as if it were running on the native hardware 2. Guest software should not be able to change allocation of real system resources
47
What is virtual memory?
A technique that uses main memory as a cache for secondary memory
48
What is a physical address?
An address in main memory
49
What is protection?
A set of mechanisms to ensure that multiple processes sharing the same resources cannot interfere with one another by reading or writing each other’s data
50
What is a page fault?
An event that occurs when a accessed page is not present in main memory
51
What is a virtual address?
An address that corresponds to a location in virtual space and is translated by address mapping to a physical address when memory is accessed
52
What is address translation?
Address mapping The process by which a virtual address is mapped to an address used to access memory
53
What are the two benefits of virtual memory?
1. Enables multiple programs and virtual machines to shame memory safely without interference 2. Allows programs to use more memory than physically available
54
What is a page?
A virtual memory block
55
The processor generates what?
Virtual address that are translated to physical addresses to access RAM
56
Both types of memories are divided into what?
Pages(small chunks of memory )
57
If a virtual page is not in RAM….
A page fault occurs, and the Operating System loads the page from disk to RAM
58
What is relocation?
Mapping the virtual addresses used by a program to different physical addresses before the addresses are used to access memory
59
What are the benefits of relocation?
It allows the OS to allocate smaller pages throughout main memory instead of searching for one big contiguous block of FREE memory
60
How is a virtual address divided into?
VPN- virtual page number- identifies which virtual page the address belongs to Page offset- specified the exact location within the page
61
How did system design change due to page faults. 3
1. Larger page size 2. Fully associative placement(page can be placed anywhere) 3. Using write back scene when accessing disk
62
What is segmentation?
A variable sized address mapping scheme in which an address consist of two parts: segment number which is mapped to a physical address and a segment offset
63
What is a page table?
The table containing the virtual to physical address translations in a virtual memory system.
64
Where is the page table stored and how is it indexed?
It is stored in memory and is indexed by the VPN, each entry contains the physical page number for that virtual page
65
How to reduce page faults
1. Flexible page mapping- OS can map any virtual page to any physical page in RAM- so if a page fault occurs the OS can replace any page in RAM with the missing page Using LRU
66
How to reduce page faults
1. Flexible page mapping- OS can map any virtual page to any physical page in RAM- so if a page fault occurs the OS can replace any page in RAM with the missing page Using LRU
67
Why do we need a page table?
It stores the mappings between virtual and physical pages. It is stored in main memory
68
What happens if the valid bit is off?
The virtual page is not in memory and a fault happens. The exception mechanism gives control to the OS and the OS retrieves the page from secondary memory and it places the page into main memory
69
What is swap space?
The space on the disk reserved for the full virtual memory space of a process
70
What is a swap space used for?
To store inactive virtual pages that are not needed in RAM
71
Why do we need a swap space
When a process is created, we cannot predict that a virtual page will be swapped out so it preallocates space in the swap area for all the pages of a process
72
What is a reference bit?
A field that is set whenever a page is accessed and that is used to implement LRU or other replacement schemes
73
What does the OS creates to track which processes and virtual addresses uses a physical page?
A data structure. Will also use the LRU scheme to find out which page needs to be swapped out if all pages are in use in MM
74
What is a dirty bit?
A flag in the page table that tracks if a page has been modified since it was loaded into memory
75
What is a TLB?
Translation lookaside buffer A cache that keeps track of recently used address mappings to avoid an access the the page table
76
How to a TOB table structures?
Tag entry- contains portion of virtual page number to identify the mapping Data entry- corresponding physical page number Dirty bit- if page has been modified since Reference bit- tracks recent usage
77
How does the TLB Work
Every memory reference, the TLB is accessed to see if there virtual to ohysical mapping is cached, if it is a hit the physical address is retrieved directly. If not the system accessed the page table in memory and fetches the required mapping and updated TLB
78
What is a virtually addresses cache?
A cache that is accessed with a virtual address rather an a physical address
79
What is aliasing?
Where two addresses access the same object
80
What is a physically addressed cache?
A cache that is addressed by a physical address
81
The write access bit in TLB does what?
It protects a page from being written by different processes who share the same memory
82
What are the three requirements to implement protection in virtual memory?
1. Support two modes that indicate if a running process is a user or operating system process 2. User process can read but not write 3. Have mechanisms where processor can go from user process to supervisor mode(system call)
83
What is supervisor mode?
Kernel mode- a mode indicating a running process is a OS
84
What is a system call?
A special instruction that transfers control from user mode to a dedicated location in supervisor code space, invoking the exception mechanism in the process
85
What is a context switch?
A changing of the internal state of the processor to allow a different process to use the processor that includes saving the state needed to return to the currently executing process
86
What is an exception enable?
A signal that controls whether the process responds to an exception or not- prevents occurrence of exceptions during intervals before processor saved the state needed to restart
87
What is restorable instruction
An instruction that can resume execution after an exception is resolved without the exception affecting the result of the instruction

Computer architecture (1 decks)

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