Section 1 - Components Of A Computer Flashcards
What does the control unit do?
Controls and coordinates the CPU, accepts and decodes instructions, manages their executions and the resulting data storage.
What is the system bus?
A set of 3 busses, the control, data and address busses.
What is meant by each bus being a shared transmission medium?
Only one device can transmit along a bus at any one time.
What is the control bus and what is it for?
The control bus is a bi-directional bus used to transmit command, timing and specific status info between components.
What are 6 examples of control lines within the control bus?
Bus request (to use the data bus)
Bus grant (to use the data bus)
Memory write (data on the data bus gets written to the addressed location)
Memory read (data from addressed location gets put on the data bus)
Interrupt request (device requesting CPU access)
Clock
What is the data bus and its purpose?
The data bus is usually 8, 16, 32 or 64 lines for bidirectional transmission of data and instructions
What is a ‘word’ in terms of memory
The word size is the amount of bits per piece of internally divided memory. A CPU can only handle word sizes specific to its architecture
What is the address bus and what does it do?
Transmits the memory address of words to be used as operands in program instructions
What is the ALU and what does it do?
The arithmetic logic unit performs basic arithmetic and Boolean logic operations.
What is the accumulator for?
Stores all of the results from the ALU
What does the PC do?
Stores the address of the next instruction to be executed, this could be the next sequential address or the next address provided by a branch or jump instruction, copied from the CIR
What does the CIR do?
Stored the current instruction being executed, divided into operand and opcode
What does the MAR (memory address register) do?
Stores the memory address location that data is to be fetched from or written to
What does the MDR (memory data register) do?
Temporarily stores the data that has just been read from memory or is going to be written to memory.
Simply describes what happens in the registers during the fetch phase of the fetch-decode-execute cycle.
- The address of the next instruction is copied from the PC to the MAR
- The instruction at that address is copied to the MDR and the PC is incremented
- The contents of the MDR are copied to the CIR
Simply describe what happens during the decode part of the fetch-decode-execute cycle
The instruction in the CIR is decoded into opcode and operand and the opcode is interpreted to find out the type of instruction given and the hardware needed to execute it.
What 3 things, useful in the FDE cycle does the operand hold?
The address of the data held to be executed (copied to MAR), or,
The actual data to be operated on (copied to MDR)
The data to be operated on but needs to be passed to the ALU
What 3 main factors affect CPU performance the most?
Clock speed
The number of cores, or duplicate processors all on one chip
The amount and type of cache memory
How does the CPU respond to the system clock?
Each ‘pulse’ of the system clock (change from 0 to 1) starts a processor activity
How is clock speed measured and what is a typical clock speed
1 Hertz or 1Hz is 1 operation per second. Typical clock speeds range from 2 - 4GHz
Why might a quad core processor not run 4 times faster than a single processor?
Software is sometimes not designed to take advantage of more than one core
What is a cache for and what happens when they fill up?
They store recently fetched instructions so they can be grabbed much faster if needed again. Old instructions are overwritten if unused.
What is pipelining?
When a processor does more than one thing simultaneously to increase utilisation. For example fetching an instruction while decoding another and executing another.
How does word size affect memory size?
The word size is the max number of addresses that can be referenced, making the word size the maximum amount of memory possible for a computer
How does a data bus limit the size of values to be used within a computer?
The size of the data bus is the maximum number of bits that can be used to store a single value. I.e. a 16 but wide data bus can only store a maximum number of 2^16 in one address
What is contained in the opcode of an assembly instruction?
The basic machine operation and then the addressing mode.
What is the von Neumann architecture?
The von Neumann architecture specifies that a single bus is used for both data and instruction transmission.
What is the Harvard architecture?
A computer that has physically separate memories for instructions and data
Compare the von Neumann architecture against the Harvard architecture
Its used in conventional processors and servers
Data and programs share the same memory
One bus is used to transfer data and instructions
Programs can be optimised in size
Compare the Harvard architecture against the Von Neumann architecture
Used in digital signal processing and embedded systems, mobile communication systems and more
Instructions and data are held in separate memories
Parallel data and instruction buses may be used
Programs tend to be large
How do some high performance CPU’s utilise a mix of the Von Neumann and Harvard architectures?
They use a shared memory for the CPU but the cache is separated into an instruction cache and a data cache.
What is meant by a CISC?
A CISC is a complex instruction set computer which is a computer that utilises a reduced amount of assembly language instructions by using many simplified and specific instructions.
Why is a CISC bad?
CISCs have too many instructions that never get used but are all built into the hardware components
Why is a CISC good?
The compiler has much less work to do in converting from high-level code and because the code is short, takes up much less RAM.