SAP-1 architecture Flashcards
the instruction and any data from main memory
fetch
Convert the instruction into a language the CPU understands
Decode
Complete the instruction
Execute
what is SAP-1
The Simple-As-Possible - 1
is a very basic model of a microprocessor
SAP-1
SAP-1 is explained by –
Albert Paul Malvino
the SAP-1 design contains the – for a functional Microprocessor.
basic necessities
SAP-1’s primary purpose is to develop a – of how a microprocessor works, interacts with memory and other parts of the system like –.
basic understanding, input and output
The instruction set in SAP-1 is very — and is simple.
limited
SAP (Simple-As-Possible)-1 is the –stage in the evolution toward modern computers.
first
load data from RAM address to the accumulator
LDA 0000
Add accumulator to data from RAM address
ADD 0001
Subtract data from RAM address from the accumulator
SUB 0010
Output data in Accumulator to the display
OUT 1110
Halt all operations
HLT 1111
SAP1 has six T-states
FETCH CYCLE – T1, T2, T3 machine cycle
EXECUTE CYCLE - T4, T5, T6 machine cycle
Not all instructions require all the six T-states for execution. The unused T- state is marked as – CYCLE
No Operation (NOP) cycle.
Each T-state is called a – for SAP1.
machine cycle
A ring counter is used to – a T-state at every falling edge of clock pulse. The ring counter output is reset after the –th T-state.
generate, 6th
