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CS paper 1 > Processors and Memory > Flashcards

Processors and Memory Flashcards

1
Q

Define

PC

A

Program counter, contains the address of the next instruction

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2
Q

Define

CIR

A

Current Instructor Register: stores the address of the next instruction currently being executed and decoded

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3
Q

Define

MAR

A

Memory Address Register, holds relevant memory address (to read from or write to)

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4
Q

Define

MDR

A

Memory Data Register, stores data being transferred to and from memory. Acts as a buffer

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5
Q

Define

ALU

A

Arithmetic and Logic Unit, does all mathematical calculations and makes all logical decisions

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6
Q

Define

Accumulator

A

A storage register in teh ALU that holds the data temporarily whilst the data is being processed and before it is transferred to memory

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7
Q

Define

RISC

A

Reduced Instruction Set Computer. Only simple instructions taking one clock cycle are executed - more widely used than CISC. Used in smartphones and tablets

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8
Q

Advantages of RISC

A
  • Allows for Pipelining
  • Execution will be quicker or as fast as CISC
  • Low cost
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9
Q

Disadvantages of RISC

A
  • Compiler has to do more work
  • More RAM required
  • More instructions required
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10
Q

Define

CISC

A

Complex Instruction Set Computer: Large instruction set is used to minimise the lines of code required - mainly used for microcontrollers and embedded systems

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11
Q

Advantages of CISC

A
  • Compiler has little work to do
  • Not much RAM needed
  • Large number of instructions
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12
Q

Disadvantages of CISC

A
  • Building specifialed instructions can be inefficient when only ~20% get used per program
  • Instructions take several clock cycles
  • Expensive to build
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13
Q

Define

GPU

A

Graphics Processin Unit - dedicated graphics processor on a graphics card, used to render images stored in the RAM of the graphics card

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14
Q

Define

Multi-Core CPU

A

A CPU with more than one core on the same chip - makes use of paralell processing for optimum efficiency

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15
Q

What affects processor performance?

A
  • The number of cores performance
  • The processor’s clock speed
  • Amount/type of cache memory
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16
Q

Define

RAM

A

Random Access Memory

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17
Q

Define

Volatile Memory

A

Memory that requires power to retain stored information

18
Q

Define

ROM

A

Read Only Memory - holds information which must be permanently in memory e.g. BIOS

19
Q

Define

ADD

(Little Man Computer Instruction Set)

A

Add the contents of the memory address from the accumulator

20
Q

Define

STA

(Little Man Computer Instruction Set)

A

Store the accumulator value in the memory address given

21
Q

Define

SUB

(Little Man Computer Instruction Set)

A

Subtract the contents of the memory address from the accumulator

22
Q

Define

LDA

(Little Man Computer Instruction Set)

A

Load the content of the given memory address into the accumulator

23
Q

Define

BRA

(Little Man Computer Instruction Set)

A

Branch Always - use the address given as the address of the next instruction

24
Q

Define

BRZ

(Little Man Computer Instruction Set)

A

Branch if zero - Branch to the given address if the accumulator value is zero

25
Q

Define

BRP

(Little Man Computer Instruction Set)

A

Branch if positive - Branch to the given address if the accumulator value is positive (or zero)

26
Q

Define

INP

(Little Man Computer Instruction Set)

A

Input into the accumulator

27
Q

Define

OUT

(Little Man Computer Instruction Set)

A

Output the contents of the accumulator

28
Q

Define

HLT

(Little Man Computer Instruction Set)

A

Stops the execution of the program

29
Q

Define

DAT

(Little Man Computer Instruction Set)

A

Indicates a location to contain data

30
Q

Name the 4 addressing modes

A
  • Immediate Addressing
  • Direct Addressing
  • Indirect Addressing
  • Indexed Addressing
31
Q

Define

Immediate Addressing

(Little Man Computer Instruction Set)

A

The operand is the actual value to be operated on

32
Q

Define

Direct Addressing

(Little Man Computer Instruction Set)

A

The operand holds the memory address of the value to be operated on

33
Q

Define

Indirect Addressing

(Little Man Computer Instruction Set)

A

The operand is the location holding the address of the relevant data

34
Q

Define

Indexed Addressing

(Little Man Instruction Set)

A

Modifies the address in the address field by the addition of a number held in a special-purpose registers, called an index register, before the address is used.

35
Q

What is the formula for clock frequency

A

Clock frequency = 1 / clock period

36
Q

What is clock speed measured in

A
  • Hertz / Hz
  • Megahertz / MHz
  • Gigahertz / GHz
37
Q

What happens during the fetch stage of the FDE cycle?

A
  1. The PC keeps the address of the next instruction to be executed. The contents of the PC are copied into the MAR. This address is placed onto the address bus
  2. The CU instructs a memory read operation to read the address on the bus and transfers it to the processor, the instruction inside the address is placed onto the data bus and placed in the MDR. The PC is incremented by one.
  3. The contents of the MDR are copied into the CIR. This ensures that the current instruction is kept safe so that the MDR can be used during the execute stage, in order to store additional data that is needed.
38
Q

What happens during the decode stage?

A

The CU decodes the instruction that is kept in the CIR. This involves splitting the instruction into operand and opcode to determine what type of instruction needs to be carried out, checking if additional data are required from memory, and figuring out where these are kept in main memory.

39
Q

What happens during the execute cycle?

A

The instruction is executed. The exact sequence of operations depends on the type of instruction that is being executed. For example, for an arithmetic instruction any required data are fetched from the main memory,

40
Q
A

CS paper 1 (6 decks)

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