Process and component technology

Question 1

What are the three main steps to obtain silicon with EGS quality? (bonus: what does EGS stand for?)

Answer 1

1. Purification
2. Czrochalski crystal growth
3. Wafer shaping

EGS = electron grade silicon

Question 2

How does czrochalski crystal growth work?

Answer 2

Czrochalski crystal growth is used to grow single crystal rods of for example silicon. A seed of crystal is put in a melt of the same crystal and then slowly pulled and rotated upwards. The atoms in the melt will arrange themselves according to the seed and grow in a single crystal.

Question 3

Which techniques can be used to grow (bulk) GaAs?

Answer 3

1. Czochralski technique (for large crystals, but with an overpressure to prevent As from evaporating)
2. Bridgman technique (for smaller crystals). The Bridgman technique entails gradual freezing/solidification of single crystal GaAs.

Question 4

What is the purpose of doping?

Answer 4

The purpose of doping is to increase the conduction of the material by increasing carrier density.

Question 5

What material-specific property governs doping via the Czrochalski technique?

Answer 5

Equilibrium segregation coefficient must be close to 1, otherwise a large difference in density of doping within the rod will appear. The coefficient k0 = C¬s/Cl which are doping concentrations of solid and liquid at the interface.

Question 6

On a microscopic level, what happens when an impurity, such as arsenic, replaces a silicon atom in a silicon lattice?

Answer 6

You get a hole or a spare electron that can create a current.

Question 7

What is a likely cause for the formation of a volume defect in a crystal?

Answer 7

A collection of impurities/dopants.

Question 8

What is meant with epitaxial crystal growth?

Answer 8

Epitaxal crystal growth is growing layers of crystals on another crystal, arrange atoms on top.

Question 9

What does MBE stand for and how does it work?

Answer 9

MBE stands for Molecular Beam Epitaxy and means growing epitaxial films using atomic or molecular beams. Theprocess takes place in a ultrahigh-vacuum chamber (UVC) using clean elemental sources that isdelivered to the surface in a beam.

Question 10

What is CVD?

Answer 10

CVD, or chemical vapour deposition, is a collection of methods for thin film formation using reactantsin gas-phase.

Question 11

What does VPE stand for?

Answer 11

VPE stands for vapor-phase epitaxy and it belongs to the CVD-family.

Question 12

What are the main differences between MBE and MOVPE?

Answer 12

The main difference between MBE and MOVPE is that MBE is grown in high vacuum while MOVPE is grown in low vacuum using gas (Vapor Phase Epitaxi).

Question 13

What do we mean by heteroepitaxy and homoepitaxy?

Answer 13

Heteroepitaxi is when the substate and the epitaxal layers are different while homoepitaxy means they are the same.

Question 14

Can heteroepitaxy be lattice-matched?

Answer 14

Heteroepitaxy can be lattice matched if the two substances have the same lattice constant.

Question 15

For the best result, do we want epitaxial growth to proceed through “Step flow growth” or “2D island nucleation”, why? How can we promote one over the other?

Answer 15

The type of growth depends on the surface diffusion length (λ) and the step-step distance. If λ > step-step distance step flow grow will occur while if λ< step-step distance, there will instead be formation of 2D island nucleation. The diffusion length, λ, is altered and extended with high temperature and low deposition rate. Preferred is the step flow growth as the 2D island nucleation may cause grain boundaries due to misorientation. This since the growth takes place at multiple places over the lattice and there is two different sights for the atoms to keep growing in. However, one of the sights is favored over the other.

Question 16

Defects in epitaxial layers can severely degrade device properties. Describe some typical causes for defects during epitaxy.

Answer 16

• Grain boundaries due to 2D island growth, increase diffusion length
• Twin plane formation, surface not clean
• Edge dislocations due to lattice mismatch
• Precipitates or dislocation loops, due to too high doping concentration.

Question 17

Why are some materials “strictly forbidden” inside commercial semiconductor fab (=processing plant)?

Answer 17

Some substances might react with semiconductor and then impossible to remove, can cause defects. E.g. gold and silicon.

Question 18

What are the main parameters that describe the performance of a lithographic process?

Answer 18

• Resolution – minimum feature size
• Throughput – wafers per hour
• Registration – alignment accuracy

Question 19

Which two parameters limit the resolution in shadow printing UV lithography?

Answer 19

UV-light wavelength and gap between the wafer and the mask.

Question 20

Projection printing is used in industry and has a number of advantages over shadow printing, which are these?

Answer 20

Shadow printing is cheaper and requires less advanced material, is ok since the masks are inexpensive (might be ruined). Projection printing is safe for the mask (several cm away from wafer, resolution do not depend on gap between mask and wafer). Depends on wavelength and strength of lens.

Question 21

What is a primer and how does it work?

Answer 21

Before applying resist to semicondunctor one has to use a primer, since the semiconductor usually is hydrophilic and the resist is a polymer and therefor hydrophobic and otherwise wouldn’t stick well. The primer (HMDS) creates a hydrophobic surface.

Question 22

Why Silicon dioxide films?

Answer 22

• Good insulator (wide bandgap compared to Si)
• Hard
• Stable
• Good interface to silicon

Question 23

What are the two methods for thermal oxidation of SiO2?

Answer 23

Wet using H2O and dry using O2. Wet is much faster and used to create thick oxides, while dry thermal oxidation is slower but creates oxides of higher quality.

Question 24

Is wet or dry oxidation faster? Why?

Answer 24

Wet oxidation is faster since H2O diffuses faster than O2 in silicon.

Question 25

What is limiting the oxidation rate for thin oxides (small x)?

Answer 25

Surface reaction is limiting.

Question 26

What is limiting the oxidation rate for thick oxides (large x)?

Answer 26

Diffusion.

Question 27

41. The linear-parabolic model for Si oxidation is often written in the form: x2 +Ax = B(t
    +τ) . Consider the cases of x being either small or large - why is this model called linear-parabolic?

Answer 27

If x is very small, x^2 is so small that it can be excluded, which leaves a linear model. If x on the other hand is big, then x^2 is significantly bigger than Ax and Ax is therefor excluded leaving a parabolic model. The model changes from linear to parabolic as x grows larger.

Question 28

45. Why is it not possible to thermally grow crystalline SiO2 on a crystalline Si surface?

Answer 28

They have a big misfit. Crystalline SiO2 has trigonal structure and crystalline Si has cubic structure. Thermally grown SiO2 on Si is therefor amorphous.

Question 29

Name four methods used to measure oxide thickness

Answer 29

• Colour inspection
• Interferometry: spectral reflectance
• Ellipsometry
• Scanning probe techniques (profilimeter)

Question 30

What is ellipsometry?

Answer 30

Ellipsometry is a non-destructive optical characterisation technique. It analyses change in polarisation after light has been reflectet off the surface at different angles with different wavelengths. It gives info on layer thickness and film properties such as refractive index, roughness and crystal quality. One drawback of this technique is that it requires an input model so you need to have a general idea about the film beforehand.

Question 31

What are the main usages of deposited dielectric films?

Answer 31

• Insulation between metal layers
• Mask material for ion inplantation and diffusion
• Final passivation layer
• Diffusion source for Si doping

Question 32

Describe what happens in a typical CVD process.

Answer 32

Gas of different elements are loaded into a furnace with wafers inside. Chemical reactions of the gases then happen on the wafer surface where a solid film is formed as a by-product. Since these reactions require activation energy this energy is usually provided through heat.

Question 33

What are the advantages, and potential disadvantages, with a plasma-enhanced CVD process?

Answer 33

Because of an applied electromagnetic field the gas turns into partial plasma, which makes lower deposition temperature possible (because energy energy is already provided). The wafer is easily contaminated, and the technique works only in small- scale.

Question 34

What is meant by conformal and non-conformal step coverage?

Answer 34

Conformal step coverage means the layer has a universal thickness due to rapid migration of reactants on the surface. Non-conformal means the opposite, the difference will vary on the surface due to no surface migration.

Question 35

Why would one want to have low dielectric constant materials as insulation material between the metal interconnect layers?

Answer 35

Since this would reduce the RC constant of the interconnects and lower the power consumption and faster integrated circuits.

Question 36

What can be done to SiO2 to lower the dielectric constant?

Answer 36

The dielectric constant can be lowered by doping it with for example Flourine or Carbon. By making it more porous the constant will also decrease but also reduce the mechanical stability of the material.