Pipelining

Question 1

How many and what kinds of registers are present in the MIPS architecture?

Answer 1

There are 32 registers from r0 to r31.

Each of these registers are 32 bits and they are all equivalent except for r0 which is always 0 and r31 which is used for jal.

Question 2

What are the special registers from r0 to r31 in MIPS architecture?

Answer 2

The special registers are r0 and r31

r0: Used to store 0
r31: Used for jal (Jump and Link) instruction to store the return address of call

There are also 2 special registers $hi and $lo to store the results of multiplicatin and division.

Question 3

What are the aliases for the registers in MIPS (r29, r30, r31)?

Answer 3

r29: $29: Stack pointer:
r30: $30: frame pointer
r31: $31: return address

Question 4

What type of architecture does the MIPS use for accessing memory and stuff?

Answer 4

MIPS uses load store architecture, which means that memory is only used to :

• Load data onto registers.
• Store data from registers

Some operands can be immediate values instead of registers

Question 5

What are the 3 types of instruction formats in MIPS?

Answer 5

The three types of instruction formats are R type, I type and J Type instructions.

• R-Type: Acts on registers
• I-type: Immediate
• J-Type: Jump instructions

Question 6

How do you compile a file to mips assembly ( call.c )

Answer 6

clang -S call.c -o call.s -target mips

Question 7

What is the fetch-execute cycle in MIPS

Answer 7

There are 5 stages in the FE cycle in MIPS:

1. IF: Instruction fetch - fetch the instructions from the memory, increment the program counter.
2. ID: Decode the instruction, analyse the opcode and gather the operands.
3. EX: Execute the instruction, do computations and calculate jumps.
4. MEM: Access memory if needed
5. WB: Write back to memory.

Question 8

What is a pipeline stall?

Answer 8

Delays because the execution of one instruction depends on the result of the previous instruction.

Question 9

What are the causes of pipeline stalls?

Answer 9

Structural Hazard: 2 tasks can’t be executed simultaneously because they both require the use of the same hardware.

Data Hazard: The output of one instruction is the input of the other instruction

Control Hazard: When conditional branching changes the instruction to be executed next.

Question 10

Solutions for structural hazard and what’s the drawback?

Answer 10

Duplicating the execution units and the drawback is that this is expensive.

Question 11

Solutions for data hazards.

Answer 11

if one instruction is writing to certain registers, then stall the instructions which require those registers.

Question 12

What is data forwarding or bypassing?

Answer 12

Data forwarding or bypassing is when the ID detects a data hazard and then forwards the result to the next instruction at the same time it is being written to the destination register through the ALU outputs and the inputs.

Question 13

What is the nop in assembly?